nios2_uc_mm_interconnect_0.v 265 KB

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  1. // nios2_uc_mm_interconnect_0.v
  2. // This file was auto-generated from altera_mm_interconnect_hw.tcl. If you edit it your changes
  3. // will probably be lost.
  4. //
  5. // Generated using ACDS version 18.1 625
  6. `timescale 1 ps / 1 ps
  7. module nios2_uc_mm_interconnect_0 (
  8. input wire clk_50_clk_clk, // clk_50_clk.clk
  9. input wire nios2_reset_reset_bridge_in_reset_reset, // nios2_reset_reset_bridge_in_reset.reset
  10. input wire [19:0] nios2_data_master_address, // nios2_data_master.address
  11. output wire nios2_data_master_waitrequest, // .waitrequest
  12. input wire [3:0] nios2_data_master_byteenable, // .byteenable
  13. input wire nios2_data_master_read, // .read
  14. output wire [31:0] nios2_data_master_readdata, // .readdata
  15. input wire nios2_data_master_write, // .write
  16. input wire [31:0] nios2_data_master_writedata, // .writedata
  17. input wire nios2_data_master_debugaccess, // .debugaccess
  18. input wire [19:0] nios2_instruction_master_address, // nios2_instruction_master.address
  19. output wire nios2_instruction_master_waitrequest, // .waitrequest
  20. input wire nios2_instruction_master_read, // .read
  21. output wire [31:0] nios2_instruction_master_readdata, // .readdata
  22. output wire [0:0] jtag_uart_avalon_jtag_slave_address, // jtag_uart_avalon_jtag_slave.address
  23. output wire jtag_uart_avalon_jtag_slave_write, // .write
  24. output wire jtag_uart_avalon_jtag_slave_read, // .read
  25. input wire [31:0] jtag_uart_avalon_jtag_slave_readdata, // .readdata
  26. output wire [31:0] jtag_uart_avalon_jtag_slave_writedata, // .writedata
  27. input wire jtag_uart_avalon_jtag_slave_waitrequest, // .waitrequest
  28. output wire jtag_uart_avalon_jtag_slave_chipselect, // .chipselect
  29. output wire [1:0] lcd_16207_control_slave_address, // lcd_16207_control_slave.address
  30. output wire lcd_16207_control_slave_write, // .write
  31. output wire lcd_16207_control_slave_read, // .read
  32. input wire [7:0] lcd_16207_control_slave_readdata, // .readdata
  33. output wire [7:0] lcd_16207_control_slave_writedata, // .writedata
  34. output wire lcd_16207_control_slave_begintransfer, // .begintransfer
  35. output wire [8:0] nios2_debug_mem_slave_address, // nios2_debug_mem_slave.address
  36. output wire nios2_debug_mem_slave_write, // .write
  37. output wire nios2_debug_mem_slave_read, // .read
  38. input wire [31:0] nios2_debug_mem_slave_readdata, // .readdata
  39. output wire [31:0] nios2_debug_mem_slave_writedata, // .writedata
  40. output wire [3:0] nios2_debug_mem_slave_byteenable, // .byteenable
  41. input wire nios2_debug_mem_slave_waitrequest, // .waitrequest
  42. output wire nios2_debug_mem_slave_debugaccess, // .debugaccess
  43. output wire [15:0] onchip_memory2_s1_address, // onchip_memory2_s1.address
  44. output wire onchip_memory2_s1_write, // .write
  45. input wire [31:0] onchip_memory2_s1_readdata, // .readdata
  46. output wire [31:0] onchip_memory2_s1_writedata, // .writedata
  47. output wire [3:0] onchip_memory2_s1_byteenable, // .byteenable
  48. output wire onchip_memory2_s1_chipselect, // .chipselect
  49. output wire onchip_memory2_s1_clken, // .clken
  50. output wire [1:0] pio_BUTTON_s1_address, // pio_BUTTON_s1.address
  51. input wire [31:0] pio_BUTTON_s1_readdata, // .readdata
  52. output wire [1:0] pio_LED_s1_address, // pio_LED_s1.address
  53. output wire pio_LED_s1_write, // .write
  54. input wire [31:0] pio_LED_s1_readdata, // .readdata
  55. output wire [31:0] pio_LED_s1_writedata, // .writedata
  56. output wire pio_LED_s1_chipselect, // .chipselect
  57. output wire [1:0] pio_MATRIX_s1_address, // pio_MATRIX_s1.address
  58. output wire pio_MATRIX_s1_write, // .write
  59. input wire [31:0] pio_MATRIX_s1_readdata, // .readdata
  60. output wire [31:0] pio_MATRIX_s1_writedata, // .writedata
  61. output wire pio_MATRIX_s1_chipselect // .chipselect
  62. );
  63. wire nios2_data_master_translator_avalon_universal_master_0_waitrequest; // nios2_data_master_agent:av_waitrequest -> nios2_data_master_translator:uav_waitrequest
  64. wire [31:0] nios2_data_master_translator_avalon_universal_master_0_readdata; // nios2_data_master_agent:av_readdata -> nios2_data_master_translator:uav_readdata
  65. wire nios2_data_master_translator_avalon_universal_master_0_debugaccess; // nios2_data_master_translator:uav_debugaccess -> nios2_data_master_agent:av_debugaccess
  66. wire [19:0] nios2_data_master_translator_avalon_universal_master_0_address; // nios2_data_master_translator:uav_address -> nios2_data_master_agent:av_address
  67. wire nios2_data_master_translator_avalon_universal_master_0_read; // nios2_data_master_translator:uav_read -> nios2_data_master_agent:av_read
  68. wire [3:0] nios2_data_master_translator_avalon_universal_master_0_byteenable; // nios2_data_master_translator:uav_byteenable -> nios2_data_master_agent:av_byteenable
  69. wire nios2_data_master_translator_avalon_universal_master_0_readdatavalid; // nios2_data_master_agent:av_readdatavalid -> nios2_data_master_translator:uav_readdatavalid
  70. wire nios2_data_master_translator_avalon_universal_master_0_lock; // nios2_data_master_translator:uav_lock -> nios2_data_master_agent:av_lock
  71. wire nios2_data_master_translator_avalon_universal_master_0_write; // nios2_data_master_translator:uav_write -> nios2_data_master_agent:av_write
  72. wire [31:0] nios2_data_master_translator_avalon_universal_master_0_writedata; // nios2_data_master_translator:uav_writedata -> nios2_data_master_agent:av_writedata
  73. wire [2:0] nios2_data_master_translator_avalon_universal_master_0_burstcount; // nios2_data_master_translator:uav_burstcount -> nios2_data_master_agent:av_burstcount
  74. wire rsp_mux_src_valid; // rsp_mux:src_valid -> nios2_data_master_agent:rp_valid
  75. wire [95:0] rsp_mux_src_data; // rsp_mux:src_data -> nios2_data_master_agent:rp_data
  76. wire rsp_mux_src_ready; // nios2_data_master_agent:rp_ready -> rsp_mux:src_ready
  77. wire [6:0] rsp_mux_src_channel; // rsp_mux:src_channel -> nios2_data_master_agent:rp_channel
  78. wire rsp_mux_src_startofpacket; // rsp_mux:src_startofpacket -> nios2_data_master_agent:rp_startofpacket
  79. wire rsp_mux_src_endofpacket; // rsp_mux:src_endofpacket -> nios2_data_master_agent:rp_endofpacket
  80. wire nios2_instruction_master_translator_avalon_universal_master_0_waitrequest; // nios2_instruction_master_agent:av_waitrequest -> nios2_instruction_master_translator:uav_waitrequest
  81. wire [31:0] nios2_instruction_master_translator_avalon_universal_master_0_readdata; // nios2_instruction_master_agent:av_readdata -> nios2_instruction_master_translator:uav_readdata
  82. wire nios2_instruction_master_translator_avalon_universal_master_0_debugaccess; // nios2_instruction_master_translator:uav_debugaccess -> nios2_instruction_master_agent:av_debugaccess
  83. wire [19:0] nios2_instruction_master_translator_avalon_universal_master_0_address; // nios2_instruction_master_translator:uav_address -> nios2_instruction_master_agent:av_address
  84. wire nios2_instruction_master_translator_avalon_universal_master_0_read; // nios2_instruction_master_translator:uav_read -> nios2_instruction_master_agent:av_read
  85. wire [3:0] nios2_instruction_master_translator_avalon_universal_master_0_byteenable; // nios2_instruction_master_translator:uav_byteenable -> nios2_instruction_master_agent:av_byteenable
  86. wire nios2_instruction_master_translator_avalon_universal_master_0_readdatavalid; // nios2_instruction_master_agent:av_readdatavalid -> nios2_instruction_master_translator:uav_readdatavalid
  87. wire nios2_instruction_master_translator_avalon_universal_master_0_lock; // nios2_instruction_master_translator:uav_lock -> nios2_instruction_master_agent:av_lock
  88. wire nios2_instruction_master_translator_avalon_universal_master_0_write; // nios2_instruction_master_translator:uav_write -> nios2_instruction_master_agent:av_write
  89. wire [31:0] nios2_instruction_master_translator_avalon_universal_master_0_writedata; // nios2_instruction_master_translator:uav_writedata -> nios2_instruction_master_agent:av_writedata
  90. wire [2:0] nios2_instruction_master_translator_avalon_universal_master_0_burstcount; // nios2_instruction_master_translator:uav_burstcount -> nios2_instruction_master_agent:av_burstcount
  91. wire rsp_mux_001_src_valid; // rsp_mux_001:src_valid -> nios2_instruction_master_agent:rp_valid
  92. wire [95:0] rsp_mux_001_src_data; // rsp_mux_001:src_data -> nios2_instruction_master_agent:rp_data
  93. wire rsp_mux_001_src_ready; // nios2_instruction_master_agent:rp_ready -> rsp_mux_001:src_ready
  94. wire [6:0] rsp_mux_001_src_channel; // rsp_mux_001:src_channel -> nios2_instruction_master_agent:rp_channel
  95. wire rsp_mux_001_src_startofpacket; // rsp_mux_001:src_startofpacket -> nios2_instruction_master_agent:rp_startofpacket
  96. wire rsp_mux_001_src_endofpacket; // rsp_mux_001:src_endofpacket -> nios2_instruction_master_agent:rp_endofpacket
  97. wire [31:0] jtag_uart_avalon_jtag_slave_agent_m0_readdata; // jtag_uart_avalon_jtag_slave_translator:uav_readdata -> jtag_uart_avalon_jtag_slave_agent:m0_readdata
  98. wire jtag_uart_avalon_jtag_slave_agent_m0_waitrequest; // jtag_uart_avalon_jtag_slave_translator:uav_waitrequest -> jtag_uart_avalon_jtag_slave_agent:m0_waitrequest
  99. wire jtag_uart_avalon_jtag_slave_agent_m0_debugaccess; // jtag_uart_avalon_jtag_slave_agent:m0_debugaccess -> jtag_uart_avalon_jtag_slave_translator:uav_debugaccess
  100. wire [19:0] jtag_uart_avalon_jtag_slave_agent_m0_address; // jtag_uart_avalon_jtag_slave_agent:m0_address -> jtag_uart_avalon_jtag_slave_translator:uav_address
  101. wire [3:0] jtag_uart_avalon_jtag_slave_agent_m0_byteenable; // jtag_uart_avalon_jtag_slave_agent:m0_byteenable -> jtag_uart_avalon_jtag_slave_translator:uav_byteenable
  102. wire jtag_uart_avalon_jtag_slave_agent_m0_read; // jtag_uart_avalon_jtag_slave_agent:m0_read -> jtag_uart_avalon_jtag_slave_translator:uav_read
  103. wire jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid; // jtag_uart_avalon_jtag_slave_translator:uav_readdatavalid -> jtag_uart_avalon_jtag_slave_agent:m0_readdatavalid
  104. wire jtag_uart_avalon_jtag_slave_agent_m0_lock; // jtag_uart_avalon_jtag_slave_agent:m0_lock -> jtag_uart_avalon_jtag_slave_translator:uav_lock
  105. wire [31:0] jtag_uart_avalon_jtag_slave_agent_m0_writedata; // jtag_uart_avalon_jtag_slave_agent:m0_writedata -> jtag_uart_avalon_jtag_slave_translator:uav_writedata
  106. wire jtag_uart_avalon_jtag_slave_agent_m0_write; // jtag_uart_avalon_jtag_slave_agent:m0_write -> jtag_uart_avalon_jtag_slave_translator:uav_write
  107. wire [2:0] jtag_uart_avalon_jtag_slave_agent_m0_burstcount; // jtag_uart_avalon_jtag_slave_agent:m0_burstcount -> jtag_uart_avalon_jtag_slave_translator:uav_burstcount
  108. wire jtag_uart_avalon_jtag_slave_agent_rf_source_valid; // jtag_uart_avalon_jtag_slave_agent:rf_source_valid -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_valid
  109. wire [96:0] jtag_uart_avalon_jtag_slave_agent_rf_source_data; // jtag_uart_avalon_jtag_slave_agent:rf_source_data -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_data
  110. wire jtag_uart_avalon_jtag_slave_agent_rf_source_ready; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_ready -> jtag_uart_avalon_jtag_slave_agent:rf_source_ready
  111. wire jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket; // jtag_uart_avalon_jtag_slave_agent:rf_source_startofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_startofpacket
  112. wire jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket; // jtag_uart_avalon_jtag_slave_agent:rf_source_endofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_endofpacket
  113. wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_valid -> jtag_uart_avalon_jtag_slave_agent:rf_sink_valid
  114. wire [96:0] jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_data -> jtag_uart_avalon_jtag_slave_agent:rf_sink_data
  115. wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready; // jtag_uart_avalon_jtag_slave_agent:rf_sink_ready -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_ready
  116. wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_startofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_startofpacket
  117. wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_endofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_endofpacket
  118. wire cmd_mux_src_valid; // cmd_mux:src_valid -> jtag_uart_avalon_jtag_slave_agent:cp_valid
  119. wire [95:0] cmd_mux_src_data; // cmd_mux:src_data -> jtag_uart_avalon_jtag_slave_agent:cp_data
  120. wire cmd_mux_src_ready; // jtag_uart_avalon_jtag_slave_agent:cp_ready -> cmd_mux:src_ready
  121. wire [6:0] cmd_mux_src_channel; // cmd_mux:src_channel -> jtag_uart_avalon_jtag_slave_agent:cp_channel
  122. wire cmd_mux_src_startofpacket; // cmd_mux:src_startofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_startofpacket
  123. wire cmd_mux_src_endofpacket; // cmd_mux:src_endofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_endofpacket
  124. wire [31:0] lcd_16207_control_slave_agent_m0_readdata; // lcd_16207_control_slave_translator:uav_readdata -> lcd_16207_control_slave_agent:m0_readdata
  125. wire lcd_16207_control_slave_agent_m0_waitrequest; // lcd_16207_control_slave_translator:uav_waitrequest -> lcd_16207_control_slave_agent:m0_waitrequest
  126. wire lcd_16207_control_slave_agent_m0_debugaccess; // lcd_16207_control_slave_agent:m0_debugaccess -> lcd_16207_control_slave_translator:uav_debugaccess
  127. wire [19:0] lcd_16207_control_slave_agent_m0_address; // lcd_16207_control_slave_agent:m0_address -> lcd_16207_control_slave_translator:uav_address
  128. wire [3:0] lcd_16207_control_slave_agent_m0_byteenable; // lcd_16207_control_slave_agent:m0_byteenable -> lcd_16207_control_slave_translator:uav_byteenable
  129. wire lcd_16207_control_slave_agent_m0_read; // lcd_16207_control_slave_agent:m0_read -> lcd_16207_control_slave_translator:uav_read
  130. wire lcd_16207_control_slave_agent_m0_readdatavalid; // lcd_16207_control_slave_translator:uav_readdatavalid -> lcd_16207_control_slave_agent:m0_readdatavalid
  131. wire lcd_16207_control_slave_agent_m0_lock; // lcd_16207_control_slave_agent:m0_lock -> lcd_16207_control_slave_translator:uav_lock
  132. wire [31:0] lcd_16207_control_slave_agent_m0_writedata; // lcd_16207_control_slave_agent:m0_writedata -> lcd_16207_control_slave_translator:uav_writedata
  133. wire lcd_16207_control_slave_agent_m0_write; // lcd_16207_control_slave_agent:m0_write -> lcd_16207_control_slave_translator:uav_write
  134. wire [2:0] lcd_16207_control_slave_agent_m0_burstcount; // lcd_16207_control_slave_agent:m0_burstcount -> lcd_16207_control_slave_translator:uav_burstcount
  135. wire lcd_16207_control_slave_agent_rf_source_valid; // lcd_16207_control_slave_agent:rf_source_valid -> lcd_16207_control_slave_agent_rsp_fifo:in_valid
  136. wire [96:0] lcd_16207_control_slave_agent_rf_source_data; // lcd_16207_control_slave_agent:rf_source_data -> lcd_16207_control_slave_agent_rsp_fifo:in_data
  137. wire lcd_16207_control_slave_agent_rf_source_ready; // lcd_16207_control_slave_agent_rsp_fifo:in_ready -> lcd_16207_control_slave_agent:rf_source_ready
  138. wire lcd_16207_control_slave_agent_rf_source_startofpacket; // lcd_16207_control_slave_agent:rf_source_startofpacket -> lcd_16207_control_slave_agent_rsp_fifo:in_startofpacket
  139. wire lcd_16207_control_slave_agent_rf_source_endofpacket; // lcd_16207_control_slave_agent:rf_source_endofpacket -> lcd_16207_control_slave_agent_rsp_fifo:in_endofpacket
  140. wire lcd_16207_control_slave_agent_rsp_fifo_out_valid; // lcd_16207_control_slave_agent_rsp_fifo:out_valid -> lcd_16207_control_slave_agent:rf_sink_valid
  141. wire [96:0] lcd_16207_control_slave_agent_rsp_fifo_out_data; // lcd_16207_control_slave_agent_rsp_fifo:out_data -> lcd_16207_control_slave_agent:rf_sink_data
  142. wire lcd_16207_control_slave_agent_rsp_fifo_out_ready; // lcd_16207_control_slave_agent:rf_sink_ready -> lcd_16207_control_slave_agent_rsp_fifo:out_ready
  143. wire lcd_16207_control_slave_agent_rsp_fifo_out_startofpacket; // lcd_16207_control_slave_agent_rsp_fifo:out_startofpacket -> lcd_16207_control_slave_agent:rf_sink_startofpacket
  144. wire lcd_16207_control_slave_agent_rsp_fifo_out_endofpacket; // lcd_16207_control_slave_agent_rsp_fifo:out_endofpacket -> lcd_16207_control_slave_agent:rf_sink_endofpacket
  145. wire cmd_mux_001_src_valid; // cmd_mux_001:src_valid -> lcd_16207_control_slave_agent:cp_valid
  146. wire [95:0] cmd_mux_001_src_data; // cmd_mux_001:src_data -> lcd_16207_control_slave_agent:cp_data
  147. wire cmd_mux_001_src_ready; // lcd_16207_control_slave_agent:cp_ready -> cmd_mux_001:src_ready
  148. wire [6:0] cmd_mux_001_src_channel; // cmd_mux_001:src_channel -> lcd_16207_control_slave_agent:cp_channel
  149. wire cmd_mux_001_src_startofpacket; // cmd_mux_001:src_startofpacket -> lcd_16207_control_slave_agent:cp_startofpacket
  150. wire cmd_mux_001_src_endofpacket; // cmd_mux_001:src_endofpacket -> lcd_16207_control_slave_agent:cp_endofpacket
  151. wire [31:0] nios2_debug_mem_slave_agent_m0_readdata; // nios2_debug_mem_slave_translator:uav_readdata -> nios2_debug_mem_slave_agent:m0_readdata
  152. wire nios2_debug_mem_slave_agent_m0_waitrequest; // nios2_debug_mem_slave_translator:uav_waitrequest -> nios2_debug_mem_slave_agent:m0_waitrequest
  153. wire nios2_debug_mem_slave_agent_m0_debugaccess; // nios2_debug_mem_slave_agent:m0_debugaccess -> nios2_debug_mem_slave_translator:uav_debugaccess
  154. wire [19:0] nios2_debug_mem_slave_agent_m0_address; // nios2_debug_mem_slave_agent:m0_address -> nios2_debug_mem_slave_translator:uav_address
  155. wire [3:0] nios2_debug_mem_slave_agent_m0_byteenable; // nios2_debug_mem_slave_agent:m0_byteenable -> nios2_debug_mem_slave_translator:uav_byteenable
  156. wire nios2_debug_mem_slave_agent_m0_read; // nios2_debug_mem_slave_agent:m0_read -> nios2_debug_mem_slave_translator:uav_read
  157. wire nios2_debug_mem_slave_agent_m0_readdatavalid; // nios2_debug_mem_slave_translator:uav_readdatavalid -> nios2_debug_mem_slave_agent:m0_readdatavalid
  158. wire nios2_debug_mem_slave_agent_m0_lock; // nios2_debug_mem_slave_agent:m0_lock -> nios2_debug_mem_slave_translator:uav_lock
  159. wire [31:0] nios2_debug_mem_slave_agent_m0_writedata; // nios2_debug_mem_slave_agent:m0_writedata -> nios2_debug_mem_slave_translator:uav_writedata
  160. wire nios2_debug_mem_slave_agent_m0_write; // nios2_debug_mem_slave_agent:m0_write -> nios2_debug_mem_slave_translator:uav_write
  161. wire [2:0] nios2_debug_mem_slave_agent_m0_burstcount; // nios2_debug_mem_slave_agent:m0_burstcount -> nios2_debug_mem_slave_translator:uav_burstcount
  162. wire nios2_debug_mem_slave_agent_rf_source_valid; // nios2_debug_mem_slave_agent:rf_source_valid -> nios2_debug_mem_slave_agent_rsp_fifo:in_valid
  163. wire [96:0] nios2_debug_mem_slave_agent_rf_source_data; // nios2_debug_mem_slave_agent:rf_source_data -> nios2_debug_mem_slave_agent_rsp_fifo:in_data
  164. wire nios2_debug_mem_slave_agent_rf_source_ready; // nios2_debug_mem_slave_agent_rsp_fifo:in_ready -> nios2_debug_mem_slave_agent:rf_source_ready
  165. wire nios2_debug_mem_slave_agent_rf_source_startofpacket; // nios2_debug_mem_slave_agent:rf_source_startofpacket -> nios2_debug_mem_slave_agent_rsp_fifo:in_startofpacket
  166. wire nios2_debug_mem_slave_agent_rf_source_endofpacket; // nios2_debug_mem_slave_agent:rf_source_endofpacket -> nios2_debug_mem_slave_agent_rsp_fifo:in_endofpacket
  167. wire nios2_debug_mem_slave_agent_rsp_fifo_out_valid; // nios2_debug_mem_slave_agent_rsp_fifo:out_valid -> nios2_debug_mem_slave_agent:rf_sink_valid
  168. wire [96:0] nios2_debug_mem_slave_agent_rsp_fifo_out_data; // nios2_debug_mem_slave_agent_rsp_fifo:out_data -> nios2_debug_mem_slave_agent:rf_sink_data
  169. wire nios2_debug_mem_slave_agent_rsp_fifo_out_ready; // nios2_debug_mem_slave_agent:rf_sink_ready -> nios2_debug_mem_slave_agent_rsp_fifo:out_ready
  170. wire nios2_debug_mem_slave_agent_rsp_fifo_out_startofpacket; // nios2_debug_mem_slave_agent_rsp_fifo:out_startofpacket -> nios2_debug_mem_slave_agent:rf_sink_startofpacket
  171. wire nios2_debug_mem_slave_agent_rsp_fifo_out_endofpacket; // nios2_debug_mem_slave_agent_rsp_fifo:out_endofpacket -> nios2_debug_mem_slave_agent:rf_sink_endofpacket
  172. wire cmd_mux_002_src_valid; // cmd_mux_002:src_valid -> nios2_debug_mem_slave_agent:cp_valid
  173. wire [95:0] cmd_mux_002_src_data; // cmd_mux_002:src_data -> nios2_debug_mem_slave_agent:cp_data
  174. wire cmd_mux_002_src_ready; // nios2_debug_mem_slave_agent:cp_ready -> cmd_mux_002:src_ready
  175. wire [6:0] cmd_mux_002_src_channel; // cmd_mux_002:src_channel -> nios2_debug_mem_slave_agent:cp_channel
  176. wire cmd_mux_002_src_startofpacket; // cmd_mux_002:src_startofpacket -> nios2_debug_mem_slave_agent:cp_startofpacket
  177. wire cmd_mux_002_src_endofpacket; // cmd_mux_002:src_endofpacket -> nios2_debug_mem_slave_agent:cp_endofpacket
  178. wire [31:0] onchip_memory2_s1_agent_m0_readdata; // onchip_memory2_s1_translator:uav_readdata -> onchip_memory2_s1_agent:m0_readdata
  179. wire onchip_memory2_s1_agent_m0_waitrequest; // onchip_memory2_s1_translator:uav_waitrequest -> onchip_memory2_s1_agent:m0_waitrequest
  180. wire onchip_memory2_s1_agent_m0_debugaccess; // onchip_memory2_s1_agent:m0_debugaccess -> onchip_memory2_s1_translator:uav_debugaccess
  181. wire [19:0] onchip_memory2_s1_agent_m0_address; // onchip_memory2_s1_agent:m0_address -> onchip_memory2_s1_translator:uav_address
  182. wire [3:0] onchip_memory2_s1_agent_m0_byteenable; // onchip_memory2_s1_agent:m0_byteenable -> onchip_memory2_s1_translator:uav_byteenable
  183. wire onchip_memory2_s1_agent_m0_read; // onchip_memory2_s1_agent:m0_read -> onchip_memory2_s1_translator:uav_read
  184. wire onchip_memory2_s1_agent_m0_readdatavalid; // onchip_memory2_s1_translator:uav_readdatavalid -> onchip_memory2_s1_agent:m0_readdatavalid
  185. wire onchip_memory2_s1_agent_m0_lock; // onchip_memory2_s1_agent:m0_lock -> onchip_memory2_s1_translator:uav_lock
  186. wire [31:0] onchip_memory2_s1_agent_m0_writedata; // onchip_memory2_s1_agent:m0_writedata -> onchip_memory2_s1_translator:uav_writedata
  187. wire onchip_memory2_s1_agent_m0_write; // onchip_memory2_s1_agent:m0_write -> onchip_memory2_s1_translator:uav_write
  188. wire [2:0] onchip_memory2_s1_agent_m0_burstcount; // onchip_memory2_s1_agent:m0_burstcount -> onchip_memory2_s1_translator:uav_burstcount
  189. wire onchip_memory2_s1_agent_rf_source_valid; // onchip_memory2_s1_agent:rf_source_valid -> onchip_memory2_s1_agent_rsp_fifo:in_valid
  190. wire [96:0] onchip_memory2_s1_agent_rf_source_data; // onchip_memory2_s1_agent:rf_source_data -> onchip_memory2_s1_agent_rsp_fifo:in_data
  191. wire onchip_memory2_s1_agent_rf_source_ready; // onchip_memory2_s1_agent_rsp_fifo:in_ready -> onchip_memory2_s1_agent:rf_source_ready
  192. wire onchip_memory2_s1_agent_rf_source_startofpacket; // onchip_memory2_s1_agent:rf_source_startofpacket -> onchip_memory2_s1_agent_rsp_fifo:in_startofpacket
  193. wire onchip_memory2_s1_agent_rf_source_endofpacket; // onchip_memory2_s1_agent:rf_source_endofpacket -> onchip_memory2_s1_agent_rsp_fifo:in_endofpacket
  194. wire onchip_memory2_s1_agent_rsp_fifo_out_valid; // onchip_memory2_s1_agent_rsp_fifo:out_valid -> onchip_memory2_s1_agent:rf_sink_valid
  195. wire [96:0] onchip_memory2_s1_agent_rsp_fifo_out_data; // onchip_memory2_s1_agent_rsp_fifo:out_data -> onchip_memory2_s1_agent:rf_sink_data
  196. wire onchip_memory2_s1_agent_rsp_fifo_out_ready; // onchip_memory2_s1_agent:rf_sink_ready -> onchip_memory2_s1_agent_rsp_fifo:out_ready
  197. wire onchip_memory2_s1_agent_rsp_fifo_out_startofpacket; // onchip_memory2_s1_agent_rsp_fifo:out_startofpacket -> onchip_memory2_s1_agent:rf_sink_startofpacket
  198. wire onchip_memory2_s1_agent_rsp_fifo_out_endofpacket; // onchip_memory2_s1_agent_rsp_fifo:out_endofpacket -> onchip_memory2_s1_agent:rf_sink_endofpacket
  199. wire cmd_mux_003_src_valid; // cmd_mux_003:src_valid -> onchip_memory2_s1_agent:cp_valid
  200. wire [95:0] cmd_mux_003_src_data; // cmd_mux_003:src_data -> onchip_memory2_s1_agent:cp_data
  201. wire cmd_mux_003_src_ready; // onchip_memory2_s1_agent:cp_ready -> cmd_mux_003:src_ready
  202. wire [6:0] cmd_mux_003_src_channel; // cmd_mux_003:src_channel -> onchip_memory2_s1_agent:cp_channel
  203. wire cmd_mux_003_src_startofpacket; // cmd_mux_003:src_startofpacket -> onchip_memory2_s1_agent:cp_startofpacket
  204. wire cmd_mux_003_src_endofpacket; // cmd_mux_003:src_endofpacket -> onchip_memory2_s1_agent:cp_endofpacket
  205. wire [31:0] pio_led_s1_agent_m0_readdata; // pio_LED_s1_translator:uav_readdata -> pio_LED_s1_agent:m0_readdata
  206. wire pio_led_s1_agent_m0_waitrequest; // pio_LED_s1_translator:uav_waitrequest -> pio_LED_s1_agent:m0_waitrequest
  207. wire pio_led_s1_agent_m0_debugaccess; // pio_LED_s1_agent:m0_debugaccess -> pio_LED_s1_translator:uav_debugaccess
  208. wire [19:0] pio_led_s1_agent_m0_address; // pio_LED_s1_agent:m0_address -> pio_LED_s1_translator:uav_address
  209. wire [3:0] pio_led_s1_agent_m0_byteenable; // pio_LED_s1_agent:m0_byteenable -> pio_LED_s1_translator:uav_byteenable
  210. wire pio_led_s1_agent_m0_read; // pio_LED_s1_agent:m0_read -> pio_LED_s1_translator:uav_read
  211. wire pio_led_s1_agent_m0_readdatavalid; // pio_LED_s1_translator:uav_readdatavalid -> pio_LED_s1_agent:m0_readdatavalid
  212. wire pio_led_s1_agent_m0_lock; // pio_LED_s1_agent:m0_lock -> pio_LED_s1_translator:uav_lock
  213. wire [31:0] pio_led_s1_agent_m0_writedata; // pio_LED_s1_agent:m0_writedata -> pio_LED_s1_translator:uav_writedata
  214. wire pio_led_s1_agent_m0_write; // pio_LED_s1_agent:m0_write -> pio_LED_s1_translator:uav_write
  215. wire [2:0] pio_led_s1_agent_m0_burstcount; // pio_LED_s1_agent:m0_burstcount -> pio_LED_s1_translator:uav_burstcount
  216. wire pio_led_s1_agent_rf_source_valid; // pio_LED_s1_agent:rf_source_valid -> pio_LED_s1_agent_rsp_fifo:in_valid
  217. wire [96:0] pio_led_s1_agent_rf_source_data; // pio_LED_s1_agent:rf_source_data -> pio_LED_s1_agent_rsp_fifo:in_data
  218. wire pio_led_s1_agent_rf_source_ready; // pio_LED_s1_agent_rsp_fifo:in_ready -> pio_LED_s1_agent:rf_source_ready
  219. wire pio_led_s1_agent_rf_source_startofpacket; // pio_LED_s1_agent:rf_source_startofpacket -> pio_LED_s1_agent_rsp_fifo:in_startofpacket
  220. wire pio_led_s1_agent_rf_source_endofpacket; // pio_LED_s1_agent:rf_source_endofpacket -> pio_LED_s1_agent_rsp_fifo:in_endofpacket
  221. wire pio_led_s1_agent_rsp_fifo_out_valid; // pio_LED_s1_agent_rsp_fifo:out_valid -> pio_LED_s1_agent:rf_sink_valid
  222. wire [96:0] pio_led_s1_agent_rsp_fifo_out_data; // pio_LED_s1_agent_rsp_fifo:out_data -> pio_LED_s1_agent:rf_sink_data
  223. wire pio_led_s1_agent_rsp_fifo_out_ready; // pio_LED_s1_agent:rf_sink_ready -> pio_LED_s1_agent_rsp_fifo:out_ready
  224. wire pio_led_s1_agent_rsp_fifo_out_startofpacket; // pio_LED_s1_agent_rsp_fifo:out_startofpacket -> pio_LED_s1_agent:rf_sink_startofpacket
  225. wire pio_led_s1_agent_rsp_fifo_out_endofpacket; // pio_LED_s1_agent_rsp_fifo:out_endofpacket -> pio_LED_s1_agent:rf_sink_endofpacket
  226. wire cmd_mux_004_src_valid; // cmd_mux_004:src_valid -> pio_LED_s1_agent:cp_valid
  227. wire [95:0] cmd_mux_004_src_data; // cmd_mux_004:src_data -> pio_LED_s1_agent:cp_data
  228. wire cmd_mux_004_src_ready; // pio_LED_s1_agent:cp_ready -> cmd_mux_004:src_ready
  229. wire [6:0] cmd_mux_004_src_channel; // cmd_mux_004:src_channel -> pio_LED_s1_agent:cp_channel
  230. wire cmd_mux_004_src_startofpacket; // cmd_mux_004:src_startofpacket -> pio_LED_s1_agent:cp_startofpacket
  231. wire cmd_mux_004_src_endofpacket; // cmd_mux_004:src_endofpacket -> pio_LED_s1_agent:cp_endofpacket
  232. wire [31:0] pio_matrix_s1_agent_m0_readdata; // pio_MATRIX_s1_translator:uav_readdata -> pio_MATRIX_s1_agent:m0_readdata
  233. wire pio_matrix_s1_agent_m0_waitrequest; // pio_MATRIX_s1_translator:uav_waitrequest -> pio_MATRIX_s1_agent:m0_waitrequest
  234. wire pio_matrix_s1_agent_m0_debugaccess; // pio_MATRIX_s1_agent:m0_debugaccess -> pio_MATRIX_s1_translator:uav_debugaccess
  235. wire [19:0] pio_matrix_s1_agent_m0_address; // pio_MATRIX_s1_agent:m0_address -> pio_MATRIX_s1_translator:uav_address
  236. wire [3:0] pio_matrix_s1_agent_m0_byteenable; // pio_MATRIX_s1_agent:m0_byteenable -> pio_MATRIX_s1_translator:uav_byteenable
  237. wire pio_matrix_s1_agent_m0_read; // pio_MATRIX_s1_agent:m0_read -> pio_MATRIX_s1_translator:uav_read
  238. wire pio_matrix_s1_agent_m0_readdatavalid; // pio_MATRIX_s1_translator:uav_readdatavalid -> pio_MATRIX_s1_agent:m0_readdatavalid
  239. wire pio_matrix_s1_agent_m0_lock; // pio_MATRIX_s1_agent:m0_lock -> pio_MATRIX_s1_translator:uav_lock
  240. wire [31:0] pio_matrix_s1_agent_m0_writedata; // pio_MATRIX_s1_agent:m0_writedata -> pio_MATRIX_s1_translator:uav_writedata
  241. wire pio_matrix_s1_agent_m0_write; // pio_MATRIX_s1_agent:m0_write -> pio_MATRIX_s1_translator:uav_write
  242. wire [2:0] pio_matrix_s1_agent_m0_burstcount; // pio_MATRIX_s1_agent:m0_burstcount -> pio_MATRIX_s1_translator:uav_burstcount
  243. wire pio_matrix_s1_agent_rf_source_valid; // pio_MATRIX_s1_agent:rf_source_valid -> pio_MATRIX_s1_agent_rsp_fifo:in_valid
  244. wire [96:0] pio_matrix_s1_agent_rf_source_data; // pio_MATRIX_s1_agent:rf_source_data -> pio_MATRIX_s1_agent_rsp_fifo:in_data
  245. wire pio_matrix_s1_agent_rf_source_ready; // pio_MATRIX_s1_agent_rsp_fifo:in_ready -> pio_MATRIX_s1_agent:rf_source_ready
  246. wire pio_matrix_s1_agent_rf_source_startofpacket; // pio_MATRIX_s1_agent:rf_source_startofpacket -> pio_MATRIX_s1_agent_rsp_fifo:in_startofpacket
  247. wire pio_matrix_s1_agent_rf_source_endofpacket; // pio_MATRIX_s1_agent:rf_source_endofpacket -> pio_MATRIX_s1_agent_rsp_fifo:in_endofpacket
  248. wire pio_matrix_s1_agent_rsp_fifo_out_valid; // pio_MATRIX_s1_agent_rsp_fifo:out_valid -> pio_MATRIX_s1_agent:rf_sink_valid
  249. wire [96:0] pio_matrix_s1_agent_rsp_fifo_out_data; // pio_MATRIX_s1_agent_rsp_fifo:out_data -> pio_MATRIX_s1_agent:rf_sink_data
  250. wire pio_matrix_s1_agent_rsp_fifo_out_ready; // pio_MATRIX_s1_agent:rf_sink_ready -> pio_MATRIX_s1_agent_rsp_fifo:out_ready
  251. wire pio_matrix_s1_agent_rsp_fifo_out_startofpacket; // pio_MATRIX_s1_agent_rsp_fifo:out_startofpacket -> pio_MATRIX_s1_agent:rf_sink_startofpacket
  252. wire pio_matrix_s1_agent_rsp_fifo_out_endofpacket; // pio_MATRIX_s1_agent_rsp_fifo:out_endofpacket -> pio_MATRIX_s1_agent:rf_sink_endofpacket
  253. wire cmd_mux_005_src_valid; // cmd_mux_005:src_valid -> pio_MATRIX_s1_agent:cp_valid
  254. wire [95:0] cmd_mux_005_src_data; // cmd_mux_005:src_data -> pio_MATRIX_s1_agent:cp_data
  255. wire cmd_mux_005_src_ready; // pio_MATRIX_s1_agent:cp_ready -> cmd_mux_005:src_ready
  256. wire [6:0] cmd_mux_005_src_channel; // cmd_mux_005:src_channel -> pio_MATRIX_s1_agent:cp_channel
  257. wire cmd_mux_005_src_startofpacket; // cmd_mux_005:src_startofpacket -> pio_MATRIX_s1_agent:cp_startofpacket
  258. wire cmd_mux_005_src_endofpacket; // cmd_mux_005:src_endofpacket -> pio_MATRIX_s1_agent:cp_endofpacket
  259. wire [31:0] pio_button_s1_agent_m0_readdata; // pio_BUTTON_s1_translator:uav_readdata -> pio_BUTTON_s1_agent:m0_readdata
  260. wire pio_button_s1_agent_m0_waitrequest; // pio_BUTTON_s1_translator:uav_waitrequest -> pio_BUTTON_s1_agent:m0_waitrequest
  261. wire pio_button_s1_agent_m0_debugaccess; // pio_BUTTON_s1_agent:m0_debugaccess -> pio_BUTTON_s1_translator:uav_debugaccess
  262. wire [19:0] pio_button_s1_agent_m0_address; // pio_BUTTON_s1_agent:m0_address -> pio_BUTTON_s1_translator:uav_address
  263. wire [3:0] pio_button_s1_agent_m0_byteenable; // pio_BUTTON_s1_agent:m0_byteenable -> pio_BUTTON_s1_translator:uav_byteenable
  264. wire pio_button_s1_agent_m0_read; // pio_BUTTON_s1_agent:m0_read -> pio_BUTTON_s1_translator:uav_read
  265. wire pio_button_s1_agent_m0_readdatavalid; // pio_BUTTON_s1_translator:uav_readdatavalid -> pio_BUTTON_s1_agent:m0_readdatavalid
  266. wire pio_button_s1_agent_m0_lock; // pio_BUTTON_s1_agent:m0_lock -> pio_BUTTON_s1_translator:uav_lock
  267. wire [31:0] pio_button_s1_agent_m0_writedata; // pio_BUTTON_s1_agent:m0_writedata -> pio_BUTTON_s1_translator:uav_writedata
  268. wire pio_button_s1_agent_m0_write; // pio_BUTTON_s1_agent:m0_write -> pio_BUTTON_s1_translator:uav_write
  269. wire [2:0] pio_button_s1_agent_m0_burstcount; // pio_BUTTON_s1_agent:m0_burstcount -> pio_BUTTON_s1_translator:uav_burstcount
  270. wire pio_button_s1_agent_rf_source_valid; // pio_BUTTON_s1_agent:rf_source_valid -> pio_BUTTON_s1_agent_rsp_fifo:in_valid
  271. wire [96:0] pio_button_s1_agent_rf_source_data; // pio_BUTTON_s1_agent:rf_source_data -> pio_BUTTON_s1_agent_rsp_fifo:in_data
  272. wire pio_button_s1_agent_rf_source_ready; // pio_BUTTON_s1_agent_rsp_fifo:in_ready -> pio_BUTTON_s1_agent:rf_source_ready
  273. wire pio_button_s1_agent_rf_source_startofpacket; // pio_BUTTON_s1_agent:rf_source_startofpacket -> pio_BUTTON_s1_agent_rsp_fifo:in_startofpacket
  274. wire pio_button_s1_agent_rf_source_endofpacket; // pio_BUTTON_s1_agent:rf_source_endofpacket -> pio_BUTTON_s1_agent_rsp_fifo:in_endofpacket
  275. wire pio_button_s1_agent_rsp_fifo_out_valid; // pio_BUTTON_s1_agent_rsp_fifo:out_valid -> pio_BUTTON_s1_agent:rf_sink_valid
  276. wire [96:0] pio_button_s1_agent_rsp_fifo_out_data; // pio_BUTTON_s1_agent_rsp_fifo:out_data -> pio_BUTTON_s1_agent:rf_sink_data
  277. wire pio_button_s1_agent_rsp_fifo_out_ready; // pio_BUTTON_s1_agent:rf_sink_ready -> pio_BUTTON_s1_agent_rsp_fifo:out_ready
  278. wire pio_button_s1_agent_rsp_fifo_out_startofpacket; // pio_BUTTON_s1_agent_rsp_fifo:out_startofpacket -> pio_BUTTON_s1_agent:rf_sink_startofpacket
  279. wire pio_button_s1_agent_rsp_fifo_out_endofpacket; // pio_BUTTON_s1_agent_rsp_fifo:out_endofpacket -> pio_BUTTON_s1_agent:rf_sink_endofpacket
  280. wire cmd_mux_006_src_valid; // cmd_mux_006:src_valid -> pio_BUTTON_s1_agent:cp_valid
  281. wire [95:0] cmd_mux_006_src_data; // cmd_mux_006:src_data -> pio_BUTTON_s1_agent:cp_data
  282. wire cmd_mux_006_src_ready; // pio_BUTTON_s1_agent:cp_ready -> cmd_mux_006:src_ready
  283. wire [6:0] cmd_mux_006_src_channel; // cmd_mux_006:src_channel -> pio_BUTTON_s1_agent:cp_channel
  284. wire cmd_mux_006_src_startofpacket; // cmd_mux_006:src_startofpacket -> pio_BUTTON_s1_agent:cp_startofpacket
  285. wire cmd_mux_006_src_endofpacket; // cmd_mux_006:src_endofpacket -> pio_BUTTON_s1_agent:cp_endofpacket
  286. wire nios2_data_master_agent_cp_valid; // nios2_data_master_agent:cp_valid -> router:sink_valid
  287. wire [95:0] nios2_data_master_agent_cp_data; // nios2_data_master_agent:cp_data -> router:sink_data
  288. wire nios2_data_master_agent_cp_ready; // router:sink_ready -> nios2_data_master_agent:cp_ready
  289. wire nios2_data_master_agent_cp_startofpacket; // nios2_data_master_agent:cp_startofpacket -> router:sink_startofpacket
  290. wire nios2_data_master_agent_cp_endofpacket; // nios2_data_master_agent:cp_endofpacket -> router:sink_endofpacket
  291. wire router_src_valid; // router:src_valid -> cmd_demux:sink_valid
  292. wire [95:0] router_src_data; // router:src_data -> cmd_demux:sink_data
  293. wire router_src_ready; // cmd_demux:sink_ready -> router:src_ready
  294. wire [6:0] router_src_channel; // router:src_channel -> cmd_demux:sink_channel
  295. wire router_src_startofpacket; // router:src_startofpacket -> cmd_demux:sink_startofpacket
  296. wire router_src_endofpacket; // router:src_endofpacket -> cmd_demux:sink_endofpacket
  297. wire nios2_instruction_master_agent_cp_valid; // nios2_instruction_master_agent:cp_valid -> router_001:sink_valid
  298. wire [95:0] nios2_instruction_master_agent_cp_data; // nios2_instruction_master_agent:cp_data -> router_001:sink_data
  299. wire nios2_instruction_master_agent_cp_ready; // router_001:sink_ready -> nios2_instruction_master_agent:cp_ready
  300. wire nios2_instruction_master_agent_cp_startofpacket; // nios2_instruction_master_agent:cp_startofpacket -> router_001:sink_startofpacket
  301. wire nios2_instruction_master_agent_cp_endofpacket; // nios2_instruction_master_agent:cp_endofpacket -> router_001:sink_endofpacket
  302. wire router_001_src_valid; // router_001:src_valid -> cmd_demux_001:sink_valid
  303. wire [95:0] router_001_src_data; // router_001:src_data -> cmd_demux_001:sink_data
  304. wire router_001_src_ready; // cmd_demux_001:sink_ready -> router_001:src_ready
  305. wire [6:0] router_001_src_channel; // router_001:src_channel -> cmd_demux_001:sink_channel
  306. wire router_001_src_startofpacket; // router_001:src_startofpacket -> cmd_demux_001:sink_startofpacket
  307. wire router_001_src_endofpacket; // router_001:src_endofpacket -> cmd_demux_001:sink_endofpacket
  308. wire jtag_uart_avalon_jtag_slave_agent_rp_valid; // jtag_uart_avalon_jtag_slave_agent:rp_valid -> router_002:sink_valid
  309. wire [95:0] jtag_uart_avalon_jtag_slave_agent_rp_data; // jtag_uart_avalon_jtag_slave_agent:rp_data -> router_002:sink_data
  310. wire jtag_uart_avalon_jtag_slave_agent_rp_ready; // router_002:sink_ready -> jtag_uart_avalon_jtag_slave_agent:rp_ready
  311. wire jtag_uart_avalon_jtag_slave_agent_rp_startofpacket; // jtag_uart_avalon_jtag_slave_agent:rp_startofpacket -> router_002:sink_startofpacket
  312. wire jtag_uart_avalon_jtag_slave_agent_rp_endofpacket; // jtag_uart_avalon_jtag_slave_agent:rp_endofpacket -> router_002:sink_endofpacket
  313. wire router_002_src_valid; // router_002:src_valid -> rsp_demux:sink_valid
  314. wire [95:0] router_002_src_data; // router_002:src_data -> rsp_demux:sink_data
  315. wire router_002_src_ready; // rsp_demux:sink_ready -> router_002:src_ready
  316. wire [6:0] router_002_src_channel; // router_002:src_channel -> rsp_demux:sink_channel
  317. wire router_002_src_startofpacket; // router_002:src_startofpacket -> rsp_demux:sink_startofpacket
  318. wire router_002_src_endofpacket; // router_002:src_endofpacket -> rsp_demux:sink_endofpacket
  319. wire lcd_16207_control_slave_agent_rp_valid; // lcd_16207_control_slave_agent:rp_valid -> router_003:sink_valid
  320. wire [95:0] lcd_16207_control_slave_agent_rp_data; // lcd_16207_control_slave_agent:rp_data -> router_003:sink_data
  321. wire lcd_16207_control_slave_agent_rp_ready; // router_003:sink_ready -> lcd_16207_control_slave_agent:rp_ready
  322. wire lcd_16207_control_slave_agent_rp_startofpacket; // lcd_16207_control_slave_agent:rp_startofpacket -> router_003:sink_startofpacket
  323. wire lcd_16207_control_slave_agent_rp_endofpacket; // lcd_16207_control_slave_agent:rp_endofpacket -> router_003:sink_endofpacket
  324. wire router_003_src_valid; // router_003:src_valid -> rsp_demux_001:sink_valid
  325. wire [95:0] router_003_src_data; // router_003:src_data -> rsp_demux_001:sink_data
  326. wire router_003_src_ready; // rsp_demux_001:sink_ready -> router_003:src_ready
  327. wire [6:0] router_003_src_channel; // router_003:src_channel -> rsp_demux_001:sink_channel
  328. wire router_003_src_startofpacket; // router_003:src_startofpacket -> rsp_demux_001:sink_startofpacket
  329. wire router_003_src_endofpacket; // router_003:src_endofpacket -> rsp_demux_001:sink_endofpacket
  330. wire nios2_debug_mem_slave_agent_rp_valid; // nios2_debug_mem_slave_agent:rp_valid -> router_004:sink_valid
  331. wire [95:0] nios2_debug_mem_slave_agent_rp_data; // nios2_debug_mem_slave_agent:rp_data -> router_004:sink_data
  332. wire nios2_debug_mem_slave_agent_rp_ready; // router_004:sink_ready -> nios2_debug_mem_slave_agent:rp_ready
  333. wire nios2_debug_mem_slave_agent_rp_startofpacket; // nios2_debug_mem_slave_agent:rp_startofpacket -> router_004:sink_startofpacket
  334. wire nios2_debug_mem_slave_agent_rp_endofpacket; // nios2_debug_mem_slave_agent:rp_endofpacket -> router_004:sink_endofpacket
  335. wire router_004_src_valid; // router_004:src_valid -> rsp_demux_002:sink_valid
  336. wire [95:0] router_004_src_data; // router_004:src_data -> rsp_demux_002:sink_data
  337. wire router_004_src_ready; // rsp_demux_002:sink_ready -> router_004:src_ready
  338. wire [6:0] router_004_src_channel; // router_004:src_channel -> rsp_demux_002:sink_channel
  339. wire router_004_src_startofpacket; // router_004:src_startofpacket -> rsp_demux_002:sink_startofpacket
  340. wire router_004_src_endofpacket; // router_004:src_endofpacket -> rsp_demux_002:sink_endofpacket
  341. wire onchip_memory2_s1_agent_rp_valid; // onchip_memory2_s1_agent:rp_valid -> router_005:sink_valid
  342. wire [95:0] onchip_memory2_s1_agent_rp_data; // onchip_memory2_s1_agent:rp_data -> router_005:sink_data
  343. wire onchip_memory2_s1_agent_rp_ready; // router_005:sink_ready -> onchip_memory2_s1_agent:rp_ready
  344. wire onchip_memory2_s1_agent_rp_startofpacket; // onchip_memory2_s1_agent:rp_startofpacket -> router_005:sink_startofpacket
  345. wire onchip_memory2_s1_agent_rp_endofpacket; // onchip_memory2_s1_agent:rp_endofpacket -> router_005:sink_endofpacket
  346. wire router_005_src_valid; // router_005:src_valid -> rsp_demux_003:sink_valid
  347. wire [95:0] router_005_src_data; // router_005:src_data -> rsp_demux_003:sink_data
  348. wire router_005_src_ready; // rsp_demux_003:sink_ready -> router_005:src_ready
  349. wire [6:0] router_005_src_channel; // router_005:src_channel -> rsp_demux_003:sink_channel
  350. wire router_005_src_startofpacket; // router_005:src_startofpacket -> rsp_demux_003:sink_startofpacket
  351. wire router_005_src_endofpacket; // router_005:src_endofpacket -> rsp_demux_003:sink_endofpacket
  352. wire pio_led_s1_agent_rp_valid; // pio_LED_s1_agent:rp_valid -> router_006:sink_valid
  353. wire [95:0] pio_led_s1_agent_rp_data; // pio_LED_s1_agent:rp_data -> router_006:sink_data
  354. wire pio_led_s1_agent_rp_ready; // router_006:sink_ready -> pio_LED_s1_agent:rp_ready
  355. wire pio_led_s1_agent_rp_startofpacket; // pio_LED_s1_agent:rp_startofpacket -> router_006:sink_startofpacket
  356. wire pio_led_s1_agent_rp_endofpacket; // pio_LED_s1_agent:rp_endofpacket -> router_006:sink_endofpacket
  357. wire router_006_src_valid; // router_006:src_valid -> rsp_demux_004:sink_valid
  358. wire [95:0] router_006_src_data; // router_006:src_data -> rsp_demux_004:sink_data
  359. wire router_006_src_ready; // rsp_demux_004:sink_ready -> router_006:src_ready
  360. wire [6:0] router_006_src_channel; // router_006:src_channel -> rsp_demux_004:sink_channel
  361. wire router_006_src_startofpacket; // router_006:src_startofpacket -> rsp_demux_004:sink_startofpacket
  362. wire router_006_src_endofpacket; // router_006:src_endofpacket -> rsp_demux_004:sink_endofpacket
  363. wire pio_matrix_s1_agent_rp_valid; // pio_MATRIX_s1_agent:rp_valid -> router_007:sink_valid
  364. wire [95:0] pio_matrix_s1_agent_rp_data; // pio_MATRIX_s1_agent:rp_data -> router_007:sink_data
  365. wire pio_matrix_s1_agent_rp_ready; // router_007:sink_ready -> pio_MATRIX_s1_agent:rp_ready
  366. wire pio_matrix_s1_agent_rp_startofpacket; // pio_MATRIX_s1_agent:rp_startofpacket -> router_007:sink_startofpacket
  367. wire pio_matrix_s1_agent_rp_endofpacket; // pio_MATRIX_s1_agent:rp_endofpacket -> router_007:sink_endofpacket
  368. wire router_007_src_valid; // router_007:src_valid -> rsp_demux_005:sink_valid
  369. wire [95:0] router_007_src_data; // router_007:src_data -> rsp_demux_005:sink_data
  370. wire router_007_src_ready; // rsp_demux_005:sink_ready -> router_007:src_ready
  371. wire [6:0] router_007_src_channel; // router_007:src_channel -> rsp_demux_005:sink_channel
  372. wire router_007_src_startofpacket; // router_007:src_startofpacket -> rsp_demux_005:sink_startofpacket
  373. wire router_007_src_endofpacket; // router_007:src_endofpacket -> rsp_demux_005:sink_endofpacket
  374. wire pio_button_s1_agent_rp_valid; // pio_BUTTON_s1_agent:rp_valid -> router_008:sink_valid
  375. wire [95:0] pio_button_s1_agent_rp_data; // pio_BUTTON_s1_agent:rp_data -> router_008:sink_data
  376. wire pio_button_s1_agent_rp_ready; // router_008:sink_ready -> pio_BUTTON_s1_agent:rp_ready
  377. wire pio_button_s1_agent_rp_startofpacket; // pio_BUTTON_s1_agent:rp_startofpacket -> router_008:sink_startofpacket
  378. wire pio_button_s1_agent_rp_endofpacket; // pio_BUTTON_s1_agent:rp_endofpacket -> router_008:sink_endofpacket
  379. wire router_008_src_valid; // router_008:src_valid -> rsp_demux_006:sink_valid
  380. wire [95:0] router_008_src_data; // router_008:src_data -> rsp_demux_006:sink_data
  381. wire router_008_src_ready; // rsp_demux_006:sink_ready -> router_008:src_ready
  382. wire [6:0] router_008_src_channel; // router_008:src_channel -> rsp_demux_006:sink_channel
  383. wire router_008_src_startofpacket; // router_008:src_startofpacket -> rsp_demux_006:sink_startofpacket
  384. wire router_008_src_endofpacket; // router_008:src_endofpacket -> rsp_demux_006:sink_endofpacket
  385. wire cmd_demux_src0_valid; // cmd_demux:src0_valid -> cmd_mux:sink0_valid
  386. wire [95:0] cmd_demux_src0_data; // cmd_demux:src0_data -> cmd_mux:sink0_data
  387. wire cmd_demux_src0_ready; // cmd_mux:sink0_ready -> cmd_demux:src0_ready
  388. wire [6:0] cmd_demux_src0_channel; // cmd_demux:src0_channel -> cmd_mux:sink0_channel
  389. wire cmd_demux_src0_startofpacket; // cmd_demux:src0_startofpacket -> cmd_mux:sink0_startofpacket
  390. wire cmd_demux_src0_endofpacket; // cmd_demux:src0_endofpacket -> cmd_mux:sink0_endofpacket
  391. wire cmd_demux_src1_valid; // cmd_demux:src1_valid -> cmd_mux_001:sink0_valid
  392. wire [95:0] cmd_demux_src1_data; // cmd_demux:src1_data -> cmd_mux_001:sink0_data
  393. wire cmd_demux_src1_ready; // cmd_mux_001:sink0_ready -> cmd_demux:src1_ready
  394. wire [6:0] cmd_demux_src1_channel; // cmd_demux:src1_channel -> cmd_mux_001:sink0_channel
  395. wire cmd_demux_src1_startofpacket; // cmd_demux:src1_startofpacket -> cmd_mux_001:sink0_startofpacket
  396. wire cmd_demux_src1_endofpacket; // cmd_demux:src1_endofpacket -> cmd_mux_001:sink0_endofpacket
  397. wire cmd_demux_src2_valid; // cmd_demux:src2_valid -> cmd_mux_002:sink0_valid
  398. wire [95:0] cmd_demux_src2_data; // cmd_demux:src2_data -> cmd_mux_002:sink0_data
  399. wire cmd_demux_src2_ready; // cmd_mux_002:sink0_ready -> cmd_demux:src2_ready
  400. wire [6:0] cmd_demux_src2_channel; // cmd_demux:src2_channel -> cmd_mux_002:sink0_channel
  401. wire cmd_demux_src2_startofpacket; // cmd_demux:src2_startofpacket -> cmd_mux_002:sink0_startofpacket
  402. wire cmd_demux_src2_endofpacket; // cmd_demux:src2_endofpacket -> cmd_mux_002:sink0_endofpacket
  403. wire cmd_demux_src3_valid; // cmd_demux:src3_valid -> cmd_mux_003:sink0_valid
  404. wire [95:0] cmd_demux_src3_data; // cmd_demux:src3_data -> cmd_mux_003:sink0_data
  405. wire cmd_demux_src3_ready; // cmd_mux_003:sink0_ready -> cmd_demux:src3_ready
  406. wire [6:0] cmd_demux_src3_channel; // cmd_demux:src3_channel -> cmd_mux_003:sink0_channel
  407. wire cmd_demux_src3_startofpacket; // cmd_demux:src3_startofpacket -> cmd_mux_003:sink0_startofpacket
  408. wire cmd_demux_src3_endofpacket; // cmd_demux:src3_endofpacket -> cmd_mux_003:sink0_endofpacket
  409. wire cmd_demux_src4_valid; // cmd_demux:src4_valid -> cmd_mux_004:sink0_valid
  410. wire [95:0] cmd_demux_src4_data; // cmd_demux:src4_data -> cmd_mux_004:sink0_data
  411. wire cmd_demux_src4_ready; // cmd_mux_004:sink0_ready -> cmd_demux:src4_ready
  412. wire [6:0] cmd_demux_src4_channel; // cmd_demux:src4_channel -> cmd_mux_004:sink0_channel
  413. wire cmd_demux_src4_startofpacket; // cmd_demux:src4_startofpacket -> cmd_mux_004:sink0_startofpacket
  414. wire cmd_demux_src4_endofpacket; // cmd_demux:src4_endofpacket -> cmd_mux_004:sink0_endofpacket
  415. wire cmd_demux_src5_valid; // cmd_demux:src5_valid -> cmd_mux_005:sink0_valid
  416. wire [95:0] cmd_demux_src5_data; // cmd_demux:src5_data -> cmd_mux_005:sink0_data
  417. wire cmd_demux_src5_ready; // cmd_mux_005:sink0_ready -> cmd_demux:src5_ready
  418. wire [6:0] cmd_demux_src5_channel; // cmd_demux:src5_channel -> cmd_mux_005:sink0_channel
  419. wire cmd_demux_src5_startofpacket; // cmd_demux:src5_startofpacket -> cmd_mux_005:sink0_startofpacket
  420. wire cmd_demux_src5_endofpacket; // cmd_demux:src5_endofpacket -> cmd_mux_005:sink0_endofpacket
  421. wire cmd_demux_src6_valid; // cmd_demux:src6_valid -> cmd_mux_006:sink0_valid
  422. wire [95:0] cmd_demux_src6_data; // cmd_demux:src6_data -> cmd_mux_006:sink0_data
  423. wire cmd_demux_src6_ready; // cmd_mux_006:sink0_ready -> cmd_demux:src6_ready
  424. wire [6:0] cmd_demux_src6_channel; // cmd_demux:src6_channel -> cmd_mux_006:sink0_channel
  425. wire cmd_demux_src6_startofpacket; // cmd_demux:src6_startofpacket -> cmd_mux_006:sink0_startofpacket
  426. wire cmd_demux_src6_endofpacket; // cmd_demux:src6_endofpacket -> cmd_mux_006:sink0_endofpacket
  427. wire cmd_demux_001_src0_valid; // cmd_demux_001:src0_valid -> cmd_mux:sink1_valid
  428. wire [95:0] cmd_demux_001_src0_data; // cmd_demux_001:src0_data -> cmd_mux:sink1_data
  429. wire cmd_demux_001_src0_ready; // cmd_mux:sink1_ready -> cmd_demux_001:src0_ready
  430. wire [6:0] cmd_demux_001_src0_channel; // cmd_demux_001:src0_channel -> cmd_mux:sink1_channel
  431. wire cmd_demux_001_src0_startofpacket; // cmd_demux_001:src0_startofpacket -> cmd_mux:sink1_startofpacket
  432. wire cmd_demux_001_src0_endofpacket; // cmd_demux_001:src0_endofpacket -> cmd_mux:sink1_endofpacket
  433. wire cmd_demux_001_src1_valid; // cmd_demux_001:src1_valid -> cmd_mux_001:sink1_valid
  434. wire [95:0] cmd_demux_001_src1_data; // cmd_demux_001:src1_data -> cmd_mux_001:sink1_data
  435. wire cmd_demux_001_src1_ready; // cmd_mux_001:sink1_ready -> cmd_demux_001:src1_ready
  436. wire [6:0] cmd_demux_001_src1_channel; // cmd_demux_001:src1_channel -> cmd_mux_001:sink1_channel
  437. wire cmd_demux_001_src1_startofpacket; // cmd_demux_001:src1_startofpacket -> cmd_mux_001:sink1_startofpacket
  438. wire cmd_demux_001_src1_endofpacket; // cmd_demux_001:src1_endofpacket -> cmd_mux_001:sink1_endofpacket
  439. wire cmd_demux_001_src2_valid; // cmd_demux_001:src2_valid -> cmd_mux_002:sink1_valid
  440. wire [95:0] cmd_demux_001_src2_data; // cmd_demux_001:src2_data -> cmd_mux_002:sink1_data
  441. wire cmd_demux_001_src2_ready; // cmd_mux_002:sink1_ready -> cmd_demux_001:src2_ready
  442. wire [6:0] cmd_demux_001_src2_channel; // cmd_demux_001:src2_channel -> cmd_mux_002:sink1_channel
  443. wire cmd_demux_001_src2_startofpacket; // cmd_demux_001:src2_startofpacket -> cmd_mux_002:sink1_startofpacket
  444. wire cmd_demux_001_src2_endofpacket; // cmd_demux_001:src2_endofpacket -> cmd_mux_002:sink1_endofpacket
  445. wire cmd_demux_001_src3_valid; // cmd_demux_001:src3_valid -> cmd_mux_003:sink1_valid
  446. wire [95:0] cmd_demux_001_src3_data; // cmd_demux_001:src3_data -> cmd_mux_003:sink1_data
  447. wire cmd_demux_001_src3_ready; // cmd_mux_003:sink1_ready -> cmd_demux_001:src3_ready
  448. wire [6:0] cmd_demux_001_src3_channel; // cmd_demux_001:src3_channel -> cmd_mux_003:sink1_channel
  449. wire cmd_demux_001_src3_startofpacket; // cmd_demux_001:src3_startofpacket -> cmd_mux_003:sink1_startofpacket
  450. wire cmd_demux_001_src3_endofpacket; // cmd_demux_001:src3_endofpacket -> cmd_mux_003:sink1_endofpacket
  451. wire cmd_demux_001_src4_valid; // cmd_demux_001:src4_valid -> cmd_mux_004:sink1_valid
  452. wire [95:0] cmd_demux_001_src4_data; // cmd_demux_001:src4_data -> cmd_mux_004:sink1_data
  453. wire cmd_demux_001_src4_ready; // cmd_mux_004:sink1_ready -> cmd_demux_001:src4_ready
  454. wire [6:0] cmd_demux_001_src4_channel; // cmd_demux_001:src4_channel -> cmd_mux_004:sink1_channel
  455. wire cmd_demux_001_src4_startofpacket; // cmd_demux_001:src4_startofpacket -> cmd_mux_004:sink1_startofpacket
  456. wire cmd_demux_001_src4_endofpacket; // cmd_demux_001:src4_endofpacket -> cmd_mux_004:sink1_endofpacket
  457. wire cmd_demux_001_src5_valid; // cmd_demux_001:src5_valid -> cmd_mux_005:sink1_valid
  458. wire [95:0] cmd_demux_001_src5_data; // cmd_demux_001:src5_data -> cmd_mux_005:sink1_data
  459. wire cmd_demux_001_src5_ready; // cmd_mux_005:sink1_ready -> cmd_demux_001:src5_ready
  460. wire [6:0] cmd_demux_001_src5_channel; // cmd_demux_001:src5_channel -> cmd_mux_005:sink1_channel
  461. wire cmd_demux_001_src5_startofpacket; // cmd_demux_001:src5_startofpacket -> cmd_mux_005:sink1_startofpacket
  462. wire cmd_demux_001_src5_endofpacket; // cmd_demux_001:src5_endofpacket -> cmd_mux_005:sink1_endofpacket
  463. wire cmd_demux_001_src6_valid; // cmd_demux_001:src6_valid -> cmd_mux_006:sink1_valid
  464. wire [95:0] cmd_demux_001_src6_data; // cmd_demux_001:src6_data -> cmd_mux_006:sink1_data
  465. wire cmd_demux_001_src6_ready; // cmd_mux_006:sink1_ready -> cmd_demux_001:src6_ready
  466. wire [6:0] cmd_demux_001_src6_channel; // cmd_demux_001:src6_channel -> cmd_mux_006:sink1_channel
  467. wire cmd_demux_001_src6_startofpacket; // cmd_demux_001:src6_startofpacket -> cmd_mux_006:sink1_startofpacket
  468. wire cmd_demux_001_src6_endofpacket; // cmd_demux_001:src6_endofpacket -> cmd_mux_006:sink1_endofpacket
  469. wire rsp_demux_src0_valid; // rsp_demux:src0_valid -> rsp_mux:sink0_valid
  470. wire [95:0] rsp_demux_src0_data; // rsp_demux:src0_data -> rsp_mux:sink0_data
  471. wire rsp_demux_src0_ready; // rsp_mux:sink0_ready -> rsp_demux:src0_ready
  472. wire [6:0] rsp_demux_src0_channel; // rsp_demux:src0_channel -> rsp_mux:sink0_channel
  473. wire rsp_demux_src0_startofpacket; // rsp_demux:src0_startofpacket -> rsp_mux:sink0_startofpacket
  474. wire rsp_demux_src0_endofpacket; // rsp_demux:src0_endofpacket -> rsp_mux:sink0_endofpacket
  475. wire rsp_demux_src1_valid; // rsp_demux:src1_valid -> rsp_mux_001:sink0_valid
  476. wire [95:0] rsp_demux_src1_data; // rsp_demux:src1_data -> rsp_mux_001:sink0_data
  477. wire rsp_demux_src1_ready; // rsp_mux_001:sink0_ready -> rsp_demux:src1_ready
  478. wire [6:0] rsp_demux_src1_channel; // rsp_demux:src1_channel -> rsp_mux_001:sink0_channel
  479. wire rsp_demux_src1_startofpacket; // rsp_demux:src1_startofpacket -> rsp_mux_001:sink0_startofpacket
  480. wire rsp_demux_src1_endofpacket; // rsp_demux:src1_endofpacket -> rsp_mux_001:sink0_endofpacket
  481. wire rsp_demux_001_src0_valid; // rsp_demux_001:src0_valid -> rsp_mux:sink1_valid
  482. wire [95:0] rsp_demux_001_src0_data; // rsp_demux_001:src0_data -> rsp_mux:sink1_data
  483. wire rsp_demux_001_src0_ready; // rsp_mux:sink1_ready -> rsp_demux_001:src0_ready
  484. wire [6:0] rsp_demux_001_src0_channel; // rsp_demux_001:src0_channel -> rsp_mux:sink1_channel
  485. wire rsp_demux_001_src0_startofpacket; // rsp_demux_001:src0_startofpacket -> rsp_mux:sink1_startofpacket
  486. wire rsp_demux_001_src0_endofpacket; // rsp_demux_001:src0_endofpacket -> rsp_mux:sink1_endofpacket
  487. wire rsp_demux_001_src1_valid; // rsp_demux_001:src1_valid -> rsp_mux_001:sink1_valid
  488. wire [95:0] rsp_demux_001_src1_data; // rsp_demux_001:src1_data -> rsp_mux_001:sink1_data
  489. wire rsp_demux_001_src1_ready; // rsp_mux_001:sink1_ready -> rsp_demux_001:src1_ready
  490. wire [6:0] rsp_demux_001_src1_channel; // rsp_demux_001:src1_channel -> rsp_mux_001:sink1_channel
  491. wire rsp_demux_001_src1_startofpacket; // rsp_demux_001:src1_startofpacket -> rsp_mux_001:sink1_startofpacket
  492. wire rsp_demux_001_src1_endofpacket; // rsp_demux_001:src1_endofpacket -> rsp_mux_001:sink1_endofpacket
  493. wire rsp_demux_002_src0_valid; // rsp_demux_002:src0_valid -> rsp_mux:sink2_valid
  494. wire [95:0] rsp_demux_002_src0_data; // rsp_demux_002:src0_data -> rsp_mux:sink2_data
  495. wire rsp_demux_002_src0_ready; // rsp_mux:sink2_ready -> rsp_demux_002:src0_ready
  496. wire [6:0] rsp_demux_002_src0_channel; // rsp_demux_002:src0_channel -> rsp_mux:sink2_channel
  497. wire rsp_demux_002_src0_startofpacket; // rsp_demux_002:src0_startofpacket -> rsp_mux:sink2_startofpacket
  498. wire rsp_demux_002_src0_endofpacket; // rsp_demux_002:src0_endofpacket -> rsp_mux:sink2_endofpacket
  499. wire rsp_demux_002_src1_valid; // rsp_demux_002:src1_valid -> rsp_mux_001:sink2_valid
  500. wire [95:0] rsp_demux_002_src1_data; // rsp_demux_002:src1_data -> rsp_mux_001:sink2_data
  501. wire rsp_demux_002_src1_ready; // rsp_mux_001:sink2_ready -> rsp_demux_002:src1_ready
  502. wire [6:0] rsp_demux_002_src1_channel; // rsp_demux_002:src1_channel -> rsp_mux_001:sink2_channel
  503. wire rsp_demux_002_src1_startofpacket; // rsp_demux_002:src1_startofpacket -> rsp_mux_001:sink2_startofpacket
  504. wire rsp_demux_002_src1_endofpacket; // rsp_demux_002:src1_endofpacket -> rsp_mux_001:sink2_endofpacket
  505. wire rsp_demux_003_src0_valid; // rsp_demux_003:src0_valid -> rsp_mux:sink3_valid
  506. wire [95:0] rsp_demux_003_src0_data; // rsp_demux_003:src0_data -> rsp_mux:sink3_data
  507. wire rsp_demux_003_src0_ready; // rsp_mux:sink3_ready -> rsp_demux_003:src0_ready
  508. wire [6:0] rsp_demux_003_src0_channel; // rsp_demux_003:src0_channel -> rsp_mux:sink3_channel
  509. wire rsp_demux_003_src0_startofpacket; // rsp_demux_003:src0_startofpacket -> rsp_mux:sink3_startofpacket
  510. wire rsp_demux_003_src0_endofpacket; // rsp_demux_003:src0_endofpacket -> rsp_mux:sink3_endofpacket
  511. wire rsp_demux_003_src1_valid; // rsp_demux_003:src1_valid -> rsp_mux_001:sink3_valid
  512. wire [95:0] rsp_demux_003_src1_data; // rsp_demux_003:src1_data -> rsp_mux_001:sink3_data
  513. wire rsp_demux_003_src1_ready; // rsp_mux_001:sink3_ready -> rsp_demux_003:src1_ready
  514. wire [6:0] rsp_demux_003_src1_channel; // rsp_demux_003:src1_channel -> rsp_mux_001:sink3_channel
  515. wire rsp_demux_003_src1_startofpacket; // rsp_demux_003:src1_startofpacket -> rsp_mux_001:sink3_startofpacket
  516. wire rsp_demux_003_src1_endofpacket; // rsp_demux_003:src1_endofpacket -> rsp_mux_001:sink3_endofpacket
  517. wire rsp_demux_004_src0_valid; // rsp_demux_004:src0_valid -> rsp_mux:sink4_valid
  518. wire [95:0] rsp_demux_004_src0_data; // rsp_demux_004:src0_data -> rsp_mux:sink4_data
  519. wire rsp_demux_004_src0_ready; // rsp_mux:sink4_ready -> rsp_demux_004:src0_ready
  520. wire [6:0] rsp_demux_004_src0_channel; // rsp_demux_004:src0_channel -> rsp_mux:sink4_channel
  521. wire rsp_demux_004_src0_startofpacket; // rsp_demux_004:src0_startofpacket -> rsp_mux:sink4_startofpacket
  522. wire rsp_demux_004_src0_endofpacket; // rsp_demux_004:src0_endofpacket -> rsp_mux:sink4_endofpacket
  523. wire rsp_demux_004_src1_valid; // rsp_demux_004:src1_valid -> rsp_mux_001:sink4_valid
  524. wire [95:0] rsp_demux_004_src1_data; // rsp_demux_004:src1_data -> rsp_mux_001:sink4_data
  525. wire rsp_demux_004_src1_ready; // rsp_mux_001:sink4_ready -> rsp_demux_004:src1_ready
  526. wire [6:0] rsp_demux_004_src1_channel; // rsp_demux_004:src1_channel -> rsp_mux_001:sink4_channel
  527. wire rsp_demux_004_src1_startofpacket; // rsp_demux_004:src1_startofpacket -> rsp_mux_001:sink4_startofpacket
  528. wire rsp_demux_004_src1_endofpacket; // rsp_demux_004:src1_endofpacket -> rsp_mux_001:sink4_endofpacket
  529. wire rsp_demux_005_src0_valid; // rsp_demux_005:src0_valid -> rsp_mux:sink5_valid
  530. wire [95:0] rsp_demux_005_src0_data; // rsp_demux_005:src0_data -> rsp_mux:sink5_data
  531. wire rsp_demux_005_src0_ready; // rsp_mux:sink5_ready -> rsp_demux_005:src0_ready
  532. wire [6:0] rsp_demux_005_src0_channel; // rsp_demux_005:src0_channel -> rsp_mux:sink5_channel
  533. wire rsp_demux_005_src0_startofpacket; // rsp_demux_005:src0_startofpacket -> rsp_mux:sink5_startofpacket
  534. wire rsp_demux_005_src0_endofpacket; // rsp_demux_005:src0_endofpacket -> rsp_mux:sink5_endofpacket
  535. wire rsp_demux_005_src1_valid; // rsp_demux_005:src1_valid -> rsp_mux_001:sink5_valid
  536. wire [95:0] rsp_demux_005_src1_data; // rsp_demux_005:src1_data -> rsp_mux_001:sink5_data
  537. wire rsp_demux_005_src1_ready; // rsp_mux_001:sink5_ready -> rsp_demux_005:src1_ready
  538. wire [6:0] rsp_demux_005_src1_channel; // rsp_demux_005:src1_channel -> rsp_mux_001:sink5_channel
  539. wire rsp_demux_005_src1_startofpacket; // rsp_demux_005:src1_startofpacket -> rsp_mux_001:sink5_startofpacket
  540. wire rsp_demux_005_src1_endofpacket; // rsp_demux_005:src1_endofpacket -> rsp_mux_001:sink5_endofpacket
  541. wire rsp_demux_006_src0_valid; // rsp_demux_006:src0_valid -> rsp_mux:sink6_valid
  542. wire [95:0] rsp_demux_006_src0_data; // rsp_demux_006:src0_data -> rsp_mux:sink6_data
  543. wire rsp_demux_006_src0_ready; // rsp_mux:sink6_ready -> rsp_demux_006:src0_ready
  544. wire [6:0] rsp_demux_006_src0_channel; // rsp_demux_006:src0_channel -> rsp_mux:sink6_channel
  545. wire rsp_demux_006_src0_startofpacket; // rsp_demux_006:src0_startofpacket -> rsp_mux:sink6_startofpacket
  546. wire rsp_demux_006_src0_endofpacket; // rsp_demux_006:src0_endofpacket -> rsp_mux:sink6_endofpacket
  547. wire rsp_demux_006_src1_valid; // rsp_demux_006:src1_valid -> rsp_mux_001:sink6_valid
  548. wire [95:0] rsp_demux_006_src1_data; // rsp_demux_006:src1_data -> rsp_mux_001:sink6_data
  549. wire rsp_demux_006_src1_ready; // rsp_mux_001:sink6_ready -> rsp_demux_006:src1_ready
  550. wire [6:0] rsp_demux_006_src1_channel; // rsp_demux_006:src1_channel -> rsp_mux_001:sink6_channel
  551. wire rsp_demux_006_src1_startofpacket; // rsp_demux_006:src1_startofpacket -> rsp_mux_001:sink6_startofpacket
  552. wire rsp_demux_006_src1_endofpacket; // rsp_demux_006:src1_endofpacket -> rsp_mux_001:sink6_endofpacket
  553. wire jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid; // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_valid -> avalon_st_adapter:in_0_valid
  554. wire [33:0] jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data; // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_data -> avalon_st_adapter:in_0_data
  555. wire jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready; // avalon_st_adapter:in_0_ready -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_ready
  556. wire avalon_st_adapter_out_0_valid; // avalon_st_adapter:out_0_valid -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_valid
  557. wire [33:0] avalon_st_adapter_out_0_data; // avalon_st_adapter:out_0_data -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_data
  558. wire avalon_st_adapter_out_0_ready; // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_ready -> avalon_st_adapter:out_0_ready
  559. wire [0:0] avalon_st_adapter_out_0_error; // avalon_st_adapter:out_0_error -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_error
  560. wire lcd_16207_control_slave_agent_rdata_fifo_src_valid; // lcd_16207_control_slave_agent:rdata_fifo_src_valid -> avalon_st_adapter_001:in_0_valid
  561. wire [33:0] lcd_16207_control_slave_agent_rdata_fifo_src_data; // lcd_16207_control_slave_agent:rdata_fifo_src_data -> avalon_st_adapter_001:in_0_data
  562. wire lcd_16207_control_slave_agent_rdata_fifo_src_ready; // avalon_st_adapter_001:in_0_ready -> lcd_16207_control_slave_agent:rdata_fifo_src_ready
  563. wire avalon_st_adapter_001_out_0_valid; // avalon_st_adapter_001:out_0_valid -> lcd_16207_control_slave_agent:rdata_fifo_sink_valid
  564. wire [33:0] avalon_st_adapter_001_out_0_data; // avalon_st_adapter_001:out_0_data -> lcd_16207_control_slave_agent:rdata_fifo_sink_data
  565. wire avalon_st_adapter_001_out_0_ready; // lcd_16207_control_slave_agent:rdata_fifo_sink_ready -> avalon_st_adapter_001:out_0_ready
  566. wire [0:0] avalon_st_adapter_001_out_0_error; // avalon_st_adapter_001:out_0_error -> lcd_16207_control_slave_agent:rdata_fifo_sink_error
  567. wire nios2_debug_mem_slave_agent_rdata_fifo_src_valid; // nios2_debug_mem_slave_agent:rdata_fifo_src_valid -> avalon_st_adapter_002:in_0_valid
  568. wire [33:0] nios2_debug_mem_slave_agent_rdata_fifo_src_data; // nios2_debug_mem_slave_agent:rdata_fifo_src_data -> avalon_st_adapter_002:in_0_data
  569. wire nios2_debug_mem_slave_agent_rdata_fifo_src_ready; // avalon_st_adapter_002:in_0_ready -> nios2_debug_mem_slave_agent:rdata_fifo_src_ready
  570. wire avalon_st_adapter_002_out_0_valid; // avalon_st_adapter_002:out_0_valid -> nios2_debug_mem_slave_agent:rdata_fifo_sink_valid
  571. wire [33:0] avalon_st_adapter_002_out_0_data; // avalon_st_adapter_002:out_0_data -> nios2_debug_mem_slave_agent:rdata_fifo_sink_data
  572. wire avalon_st_adapter_002_out_0_ready; // nios2_debug_mem_slave_agent:rdata_fifo_sink_ready -> avalon_st_adapter_002:out_0_ready
  573. wire [0:0] avalon_st_adapter_002_out_0_error; // avalon_st_adapter_002:out_0_error -> nios2_debug_mem_slave_agent:rdata_fifo_sink_error
  574. wire onchip_memory2_s1_agent_rdata_fifo_src_valid; // onchip_memory2_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_003:in_0_valid
  575. wire [33:0] onchip_memory2_s1_agent_rdata_fifo_src_data; // onchip_memory2_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_003:in_0_data
  576. wire onchip_memory2_s1_agent_rdata_fifo_src_ready; // avalon_st_adapter_003:in_0_ready -> onchip_memory2_s1_agent:rdata_fifo_src_ready
  577. wire avalon_st_adapter_003_out_0_valid; // avalon_st_adapter_003:out_0_valid -> onchip_memory2_s1_agent:rdata_fifo_sink_valid
  578. wire [33:0] avalon_st_adapter_003_out_0_data; // avalon_st_adapter_003:out_0_data -> onchip_memory2_s1_agent:rdata_fifo_sink_data
  579. wire avalon_st_adapter_003_out_0_ready; // onchip_memory2_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_003:out_0_ready
  580. wire [0:0] avalon_st_adapter_003_out_0_error; // avalon_st_adapter_003:out_0_error -> onchip_memory2_s1_agent:rdata_fifo_sink_error
  581. wire pio_led_s1_agent_rdata_fifo_src_valid; // pio_LED_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_004:in_0_valid
  582. wire [33:0] pio_led_s1_agent_rdata_fifo_src_data; // pio_LED_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_004:in_0_data
  583. wire pio_led_s1_agent_rdata_fifo_src_ready; // avalon_st_adapter_004:in_0_ready -> pio_LED_s1_agent:rdata_fifo_src_ready
  584. wire avalon_st_adapter_004_out_0_valid; // avalon_st_adapter_004:out_0_valid -> pio_LED_s1_agent:rdata_fifo_sink_valid
  585. wire [33:0] avalon_st_adapter_004_out_0_data; // avalon_st_adapter_004:out_0_data -> pio_LED_s1_agent:rdata_fifo_sink_data
  586. wire avalon_st_adapter_004_out_0_ready; // pio_LED_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_004:out_0_ready
  587. wire [0:0] avalon_st_adapter_004_out_0_error; // avalon_st_adapter_004:out_0_error -> pio_LED_s1_agent:rdata_fifo_sink_error
  588. wire pio_matrix_s1_agent_rdata_fifo_src_valid; // pio_MATRIX_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_005:in_0_valid
  589. wire [33:0] pio_matrix_s1_agent_rdata_fifo_src_data; // pio_MATRIX_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_005:in_0_data
  590. wire pio_matrix_s1_agent_rdata_fifo_src_ready; // avalon_st_adapter_005:in_0_ready -> pio_MATRIX_s1_agent:rdata_fifo_src_ready
  591. wire avalon_st_adapter_005_out_0_valid; // avalon_st_adapter_005:out_0_valid -> pio_MATRIX_s1_agent:rdata_fifo_sink_valid
  592. wire [33:0] avalon_st_adapter_005_out_0_data; // avalon_st_adapter_005:out_0_data -> pio_MATRIX_s1_agent:rdata_fifo_sink_data
  593. wire avalon_st_adapter_005_out_0_ready; // pio_MATRIX_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_005:out_0_ready
  594. wire [0:0] avalon_st_adapter_005_out_0_error; // avalon_st_adapter_005:out_0_error -> pio_MATRIX_s1_agent:rdata_fifo_sink_error
  595. wire pio_button_s1_agent_rdata_fifo_src_valid; // pio_BUTTON_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_006:in_0_valid
  596. wire [33:0] pio_button_s1_agent_rdata_fifo_src_data; // pio_BUTTON_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_006:in_0_data
  597. wire pio_button_s1_agent_rdata_fifo_src_ready; // avalon_st_adapter_006:in_0_ready -> pio_BUTTON_s1_agent:rdata_fifo_src_ready
  598. wire avalon_st_adapter_006_out_0_valid; // avalon_st_adapter_006:out_0_valid -> pio_BUTTON_s1_agent:rdata_fifo_sink_valid
  599. wire [33:0] avalon_st_adapter_006_out_0_data; // avalon_st_adapter_006:out_0_data -> pio_BUTTON_s1_agent:rdata_fifo_sink_data
  600. wire avalon_st_adapter_006_out_0_ready; // pio_BUTTON_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_006:out_0_ready
  601. wire [0:0] avalon_st_adapter_006_out_0_error; // avalon_st_adapter_006:out_0_error -> pio_BUTTON_s1_agent:rdata_fifo_sink_error
  602. altera_merlin_master_translator #(
  603. .AV_ADDRESS_W (20),
  604. .AV_DATA_W (32),
  605. .AV_BURSTCOUNT_W (1),
  606. .AV_BYTEENABLE_W (4),
  607. .UAV_ADDRESS_W (20),
  608. .UAV_BURSTCOUNT_W (3),
  609. .USE_READ (1),
  610. .USE_WRITE (1),
  611. .USE_BEGINBURSTTRANSFER (0),
  612. .USE_BEGINTRANSFER (0),
  613. .USE_CHIPSELECT (0),
  614. .USE_BURSTCOUNT (0),
  615. .USE_READDATAVALID (0),
  616. .USE_WAITREQUEST (1),
  617. .USE_READRESPONSE (0),
  618. .USE_WRITERESPONSE (0),
  619. .AV_SYMBOLS_PER_WORD (4),
  620. .AV_ADDRESS_SYMBOLS (1),
  621. .AV_BURSTCOUNT_SYMBOLS (0),
  622. .AV_CONSTANT_BURST_BEHAVIOR (0),
  623. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  624. .AV_LINEWRAPBURSTS (0),
  625. .AV_REGISTERINCOMINGSIGNALS (1)
  626. ) nios2_data_master_translator (
  627. .clk (clk_50_clk_clk), // clk.clk
  628. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  629. .uav_address (nios2_data_master_translator_avalon_universal_master_0_address), // avalon_universal_master_0.address
  630. .uav_burstcount (nios2_data_master_translator_avalon_universal_master_0_burstcount), // .burstcount
  631. .uav_read (nios2_data_master_translator_avalon_universal_master_0_read), // .read
  632. .uav_write (nios2_data_master_translator_avalon_universal_master_0_write), // .write
  633. .uav_waitrequest (nios2_data_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest
  634. .uav_readdatavalid (nios2_data_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid
  635. .uav_byteenable (nios2_data_master_translator_avalon_universal_master_0_byteenable), // .byteenable
  636. .uav_readdata (nios2_data_master_translator_avalon_universal_master_0_readdata), // .readdata
  637. .uav_writedata (nios2_data_master_translator_avalon_universal_master_0_writedata), // .writedata
  638. .uav_lock (nios2_data_master_translator_avalon_universal_master_0_lock), // .lock
  639. .uav_debugaccess (nios2_data_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess
  640. .av_address (nios2_data_master_address), // avalon_anti_master_0.address
  641. .av_waitrequest (nios2_data_master_waitrequest), // .waitrequest
  642. .av_byteenable (nios2_data_master_byteenable), // .byteenable
  643. .av_read (nios2_data_master_read), // .read
  644. .av_readdata (nios2_data_master_readdata), // .readdata
  645. .av_write (nios2_data_master_write), // .write
  646. .av_writedata (nios2_data_master_writedata), // .writedata
  647. .av_debugaccess (nios2_data_master_debugaccess), // .debugaccess
  648. .av_burstcount (1'b1), // (terminated)
  649. .av_beginbursttransfer (1'b0), // (terminated)
  650. .av_begintransfer (1'b0), // (terminated)
  651. .av_chipselect (1'b0), // (terminated)
  652. .av_readdatavalid (), // (terminated)
  653. .av_lock (1'b0), // (terminated)
  654. .uav_clken (), // (terminated)
  655. .av_clken (1'b1), // (terminated)
  656. .uav_response (2'b00), // (terminated)
  657. .av_response (), // (terminated)
  658. .uav_writeresponsevalid (1'b0), // (terminated)
  659. .av_writeresponsevalid () // (terminated)
  660. );
  661. altera_merlin_master_translator #(
  662. .AV_ADDRESS_W (20),
  663. .AV_DATA_W (32),
  664. .AV_BURSTCOUNT_W (1),
  665. .AV_BYTEENABLE_W (4),
  666. .UAV_ADDRESS_W (20),
  667. .UAV_BURSTCOUNT_W (3),
  668. .USE_READ (1),
  669. .USE_WRITE (0),
  670. .USE_BEGINBURSTTRANSFER (0),
  671. .USE_BEGINTRANSFER (0),
  672. .USE_CHIPSELECT (0),
  673. .USE_BURSTCOUNT (0),
  674. .USE_READDATAVALID (0),
  675. .USE_WAITREQUEST (1),
  676. .USE_READRESPONSE (0),
  677. .USE_WRITERESPONSE (0),
  678. .AV_SYMBOLS_PER_WORD (4),
  679. .AV_ADDRESS_SYMBOLS (1),
  680. .AV_BURSTCOUNT_SYMBOLS (0),
  681. .AV_CONSTANT_BURST_BEHAVIOR (0),
  682. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  683. .AV_LINEWRAPBURSTS (1),
  684. .AV_REGISTERINCOMINGSIGNALS (0)
  685. ) nios2_instruction_master_translator (
  686. .clk (clk_50_clk_clk), // clk.clk
  687. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  688. .uav_address (nios2_instruction_master_translator_avalon_universal_master_0_address), // avalon_universal_master_0.address
  689. .uav_burstcount (nios2_instruction_master_translator_avalon_universal_master_0_burstcount), // .burstcount
  690. .uav_read (nios2_instruction_master_translator_avalon_universal_master_0_read), // .read
  691. .uav_write (nios2_instruction_master_translator_avalon_universal_master_0_write), // .write
  692. .uav_waitrequest (nios2_instruction_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest
  693. .uav_readdatavalid (nios2_instruction_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid
  694. .uav_byteenable (nios2_instruction_master_translator_avalon_universal_master_0_byteenable), // .byteenable
  695. .uav_readdata (nios2_instruction_master_translator_avalon_universal_master_0_readdata), // .readdata
  696. .uav_writedata (nios2_instruction_master_translator_avalon_universal_master_0_writedata), // .writedata
  697. .uav_lock (nios2_instruction_master_translator_avalon_universal_master_0_lock), // .lock
  698. .uav_debugaccess (nios2_instruction_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess
  699. .av_address (nios2_instruction_master_address), // avalon_anti_master_0.address
  700. .av_waitrequest (nios2_instruction_master_waitrequest), // .waitrequest
  701. .av_read (nios2_instruction_master_read), // .read
  702. .av_readdata (nios2_instruction_master_readdata), // .readdata
  703. .av_burstcount (1'b1), // (terminated)
  704. .av_byteenable (4'b1111), // (terminated)
  705. .av_beginbursttransfer (1'b0), // (terminated)
  706. .av_begintransfer (1'b0), // (terminated)
  707. .av_chipselect (1'b0), // (terminated)
  708. .av_readdatavalid (), // (terminated)
  709. .av_write (1'b0), // (terminated)
  710. .av_writedata (32'b00000000000000000000000000000000), // (terminated)
  711. .av_lock (1'b0), // (terminated)
  712. .av_debugaccess (1'b0), // (terminated)
  713. .uav_clken (), // (terminated)
  714. .av_clken (1'b1), // (terminated)
  715. .uav_response (2'b00), // (terminated)
  716. .av_response (), // (terminated)
  717. .uav_writeresponsevalid (1'b0), // (terminated)
  718. .av_writeresponsevalid () // (terminated)
  719. );
  720. altera_merlin_slave_translator #(
  721. .AV_ADDRESS_W (1),
  722. .AV_DATA_W (32),
  723. .UAV_DATA_W (32),
  724. .AV_BURSTCOUNT_W (1),
  725. .AV_BYTEENABLE_W (1),
  726. .UAV_BYTEENABLE_W (4),
  727. .UAV_ADDRESS_W (20),
  728. .UAV_BURSTCOUNT_W (3),
  729. .AV_READLATENCY (0),
  730. .USE_READDATAVALID (0),
  731. .USE_WAITREQUEST (1),
  732. .USE_UAV_CLKEN (0),
  733. .USE_READRESPONSE (0),
  734. .USE_WRITERESPONSE (0),
  735. .AV_SYMBOLS_PER_WORD (4),
  736. .AV_ADDRESS_SYMBOLS (0),
  737. .AV_BURSTCOUNT_SYMBOLS (0),
  738. .AV_CONSTANT_BURST_BEHAVIOR (0),
  739. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  740. .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
  741. .CHIPSELECT_THROUGH_READLATENCY (0),
  742. .AV_READ_WAIT_CYCLES (1),
  743. .AV_WRITE_WAIT_CYCLES (0),
  744. .AV_SETUP_WAIT_CYCLES (0),
  745. .AV_DATA_HOLD_CYCLES (0)
  746. ) jtag_uart_avalon_jtag_slave_translator (
  747. .clk (clk_50_clk_clk), // clk.clk
  748. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  749. .uav_address (jtag_uart_avalon_jtag_slave_agent_m0_address), // avalon_universal_slave_0.address
  750. .uav_burstcount (jtag_uart_avalon_jtag_slave_agent_m0_burstcount), // .burstcount
  751. .uav_read (jtag_uart_avalon_jtag_slave_agent_m0_read), // .read
  752. .uav_write (jtag_uart_avalon_jtag_slave_agent_m0_write), // .write
  753. .uav_waitrequest (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest), // .waitrequest
  754. .uav_readdatavalid (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid), // .readdatavalid
  755. .uav_byteenable (jtag_uart_avalon_jtag_slave_agent_m0_byteenable), // .byteenable
  756. .uav_readdata (jtag_uart_avalon_jtag_slave_agent_m0_readdata), // .readdata
  757. .uav_writedata (jtag_uart_avalon_jtag_slave_agent_m0_writedata), // .writedata
  758. .uav_lock (jtag_uart_avalon_jtag_slave_agent_m0_lock), // .lock
  759. .uav_debugaccess (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess), // .debugaccess
  760. .av_address (jtag_uart_avalon_jtag_slave_address), // avalon_anti_slave_0.address
  761. .av_write (jtag_uart_avalon_jtag_slave_write), // .write
  762. .av_read (jtag_uart_avalon_jtag_slave_read), // .read
  763. .av_readdata (jtag_uart_avalon_jtag_slave_readdata), // .readdata
  764. .av_writedata (jtag_uart_avalon_jtag_slave_writedata), // .writedata
  765. .av_waitrequest (jtag_uart_avalon_jtag_slave_waitrequest), // .waitrequest
  766. .av_chipselect (jtag_uart_avalon_jtag_slave_chipselect), // .chipselect
  767. .av_begintransfer (), // (terminated)
  768. .av_beginbursttransfer (), // (terminated)
  769. .av_burstcount (), // (terminated)
  770. .av_byteenable (), // (terminated)
  771. .av_readdatavalid (1'b0), // (terminated)
  772. .av_writebyteenable (), // (terminated)
  773. .av_lock (), // (terminated)
  774. .av_clken (), // (terminated)
  775. .uav_clken (1'b0), // (terminated)
  776. .av_debugaccess (), // (terminated)
  777. .av_outputenable (), // (terminated)
  778. .uav_response (), // (terminated)
  779. .av_response (2'b00), // (terminated)
  780. .uav_writeresponsevalid (), // (terminated)
  781. .av_writeresponsevalid (1'b0) // (terminated)
  782. );
  783. altera_merlin_slave_translator #(
  784. .AV_ADDRESS_W (2),
  785. .AV_DATA_W (8),
  786. .UAV_DATA_W (32),
  787. .AV_BURSTCOUNT_W (1),
  788. .AV_BYTEENABLE_W (1),
  789. .UAV_BYTEENABLE_W (4),
  790. .UAV_ADDRESS_W (20),
  791. .UAV_BURSTCOUNT_W (3),
  792. .AV_READLATENCY (0),
  793. .USE_READDATAVALID (0),
  794. .USE_WAITREQUEST (0),
  795. .USE_UAV_CLKEN (0),
  796. .USE_READRESPONSE (0),
  797. .USE_WRITERESPONSE (0),
  798. .AV_SYMBOLS_PER_WORD (4),
  799. .AV_ADDRESS_SYMBOLS (0),
  800. .AV_BURSTCOUNT_SYMBOLS (0),
  801. .AV_CONSTANT_BURST_BEHAVIOR (0),
  802. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  803. .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
  804. .CHIPSELECT_THROUGH_READLATENCY (0),
  805. .AV_READ_WAIT_CYCLES (13),
  806. .AV_WRITE_WAIT_CYCLES (13),
  807. .AV_SETUP_WAIT_CYCLES (13),
  808. .AV_DATA_HOLD_CYCLES (13)
  809. ) lcd_16207_control_slave_translator (
  810. .clk (clk_50_clk_clk), // clk.clk
  811. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  812. .uav_address (lcd_16207_control_slave_agent_m0_address), // avalon_universal_slave_0.address
  813. .uav_burstcount (lcd_16207_control_slave_agent_m0_burstcount), // .burstcount
  814. .uav_read (lcd_16207_control_slave_agent_m0_read), // .read
  815. .uav_write (lcd_16207_control_slave_agent_m0_write), // .write
  816. .uav_waitrequest (lcd_16207_control_slave_agent_m0_waitrequest), // .waitrequest
  817. .uav_readdatavalid (lcd_16207_control_slave_agent_m0_readdatavalid), // .readdatavalid
  818. .uav_byteenable (lcd_16207_control_slave_agent_m0_byteenable), // .byteenable
  819. .uav_readdata (lcd_16207_control_slave_agent_m0_readdata), // .readdata
  820. .uav_writedata (lcd_16207_control_slave_agent_m0_writedata), // .writedata
  821. .uav_lock (lcd_16207_control_slave_agent_m0_lock), // .lock
  822. .uav_debugaccess (lcd_16207_control_slave_agent_m0_debugaccess), // .debugaccess
  823. .av_address (lcd_16207_control_slave_address), // avalon_anti_slave_0.address
  824. .av_write (lcd_16207_control_slave_write), // .write
  825. .av_read (lcd_16207_control_slave_read), // .read
  826. .av_readdata (lcd_16207_control_slave_readdata), // .readdata
  827. .av_writedata (lcd_16207_control_slave_writedata), // .writedata
  828. .av_begintransfer (lcd_16207_control_slave_begintransfer), // .begintransfer
  829. .av_beginbursttransfer (), // (terminated)
  830. .av_burstcount (), // (terminated)
  831. .av_byteenable (), // (terminated)
  832. .av_readdatavalid (1'b0), // (terminated)
  833. .av_waitrequest (1'b0), // (terminated)
  834. .av_writebyteenable (), // (terminated)
  835. .av_lock (), // (terminated)
  836. .av_chipselect (), // (terminated)
  837. .av_clken (), // (terminated)
  838. .uav_clken (1'b0), // (terminated)
  839. .av_debugaccess (), // (terminated)
  840. .av_outputenable (), // (terminated)
  841. .uav_response (), // (terminated)
  842. .av_response (2'b00), // (terminated)
  843. .uav_writeresponsevalid (), // (terminated)
  844. .av_writeresponsevalid (1'b0) // (terminated)
  845. );
  846. altera_merlin_slave_translator #(
  847. .AV_ADDRESS_W (9),
  848. .AV_DATA_W (32),
  849. .UAV_DATA_W (32),
  850. .AV_BURSTCOUNT_W (1),
  851. .AV_BYTEENABLE_W (4),
  852. .UAV_BYTEENABLE_W (4),
  853. .UAV_ADDRESS_W (20),
  854. .UAV_BURSTCOUNT_W (3),
  855. .AV_READLATENCY (0),
  856. .USE_READDATAVALID (0),
  857. .USE_WAITREQUEST (1),
  858. .USE_UAV_CLKEN (0),
  859. .USE_READRESPONSE (0),
  860. .USE_WRITERESPONSE (0),
  861. .AV_SYMBOLS_PER_WORD (4),
  862. .AV_ADDRESS_SYMBOLS (0),
  863. .AV_BURSTCOUNT_SYMBOLS (0),
  864. .AV_CONSTANT_BURST_BEHAVIOR (0),
  865. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  866. .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
  867. .CHIPSELECT_THROUGH_READLATENCY (0),
  868. .AV_READ_WAIT_CYCLES (1),
  869. .AV_WRITE_WAIT_CYCLES (0),
  870. .AV_SETUP_WAIT_CYCLES (0),
  871. .AV_DATA_HOLD_CYCLES (0)
  872. ) nios2_debug_mem_slave_translator (
  873. .clk (clk_50_clk_clk), // clk.clk
  874. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  875. .uav_address (nios2_debug_mem_slave_agent_m0_address), // avalon_universal_slave_0.address
  876. .uav_burstcount (nios2_debug_mem_slave_agent_m0_burstcount), // .burstcount
  877. .uav_read (nios2_debug_mem_slave_agent_m0_read), // .read
  878. .uav_write (nios2_debug_mem_slave_agent_m0_write), // .write
  879. .uav_waitrequest (nios2_debug_mem_slave_agent_m0_waitrequest), // .waitrequest
  880. .uav_readdatavalid (nios2_debug_mem_slave_agent_m0_readdatavalid), // .readdatavalid
  881. .uav_byteenable (nios2_debug_mem_slave_agent_m0_byteenable), // .byteenable
  882. .uav_readdata (nios2_debug_mem_slave_agent_m0_readdata), // .readdata
  883. .uav_writedata (nios2_debug_mem_slave_agent_m0_writedata), // .writedata
  884. .uav_lock (nios2_debug_mem_slave_agent_m0_lock), // .lock
  885. .uav_debugaccess (nios2_debug_mem_slave_agent_m0_debugaccess), // .debugaccess
  886. .av_address (nios2_debug_mem_slave_address), // avalon_anti_slave_0.address
  887. .av_write (nios2_debug_mem_slave_write), // .write
  888. .av_read (nios2_debug_mem_slave_read), // .read
  889. .av_readdata (nios2_debug_mem_slave_readdata), // .readdata
  890. .av_writedata (nios2_debug_mem_slave_writedata), // .writedata
  891. .av_byteenable (nios2_debug_mem_slave_byteenable), // .byteenable
  892. .av_waitrequest (nios2_debug_mem_slave_waitrequest), // .waitrequest
  893. .av_debugaccess (nios2_debug_mem_slave_debugaccess), // .debugaccess
  894. .av_begintransfer (), // (terminated)
  895. .av_beginbursttransfer (), // (terminated)
  896. .av_burstcount (), // (terminated)
  897. .av_readdatavalid (1'b0), // (terminated)
  898. .av_writebyteenable (), // (terminated)
  899. .av_lock (), // (terminated)
  900. .av_chipselect (), // (terminated)
  901. .av_clken (), // (terminated)
  902. .uav_clken (1'b0), // (terminated)
  903. .av_outputenable (), // (terminated)
  904. .uav_response (), // (terminated)
  905. .av_response (2'b00), // (terminated)
  906. .uav_writeresponsevalid (), // (terminated)
  907. .av_writeresponsevalid (1'b0) // (terminated)
  908. );
  909. altera_merlin_slave_translator #(
  910. .AV_ADDRESS_W (16),
  911. .AV_DATA_W (32),
  912. .UAV_DATA_W (32),
  913. .AV_BURSTCOUNT_W (1),
  914. .AV_BYTEENABLE_W (4),
  915. .UAV_BYTEENABLE_W (4),
  916. .UAV_ADDRESS_W (20),
  917. .UAV_BURSTCOUNT_W (3),
  918. .AV_READLATENCY (1),
  919. .USE_READDATAVALID (0),
  920. .USE_WAITREQUEST (0),
  921. .USE_UAV_CLKEN (0),
  922. .USE_READRESPONSE (0),
  923. .USE_WRITERESPONSE (0),
  924. .AV_SYMBOLS_PER_WORD (4),
  925. .AV_ADDRESS_SYMBOLS (0),
  926. .AV_BURSTCOUNT_SYMBOLS (0),
  927. .AV_CONSTANT_BURST_BEHAVIOR (0),
  928. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  929. .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
  930. .CHIPSELECT_THROUGH_READLATENCY (0),
  931. .AV_READ_WAIT_CYCLES (0),
  932. .AV_WRITE_WAIT_CYCLES (0),
  933. .AV_SETUP_WAIT_CYCLES (0),
  934. .AV_DATA_HOLD_CYCLES (0)
  935. ) onchip_memory2_s1_translator (
  936. .clk (clk_50_clk_clk), // clk.clk
  937. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  938. .uav_address (onchip_memory2_s1_agent_m0_address), // avalon_universal_slave_0.address
  939. .uav_burstcount (onchip_memory2_s1_agent_m0_burstcount), // .burstcount
  940. .uav_read (onchip_memory2_s1_agent_m0_read), // .read
  941. .uav_write (onchip_memory2_s1_agent_m0_write), // .write
  942. .uav_waitrequest (onchip_memory2_s1_agent_m0_waitrequest), // .waitrequest
  943. .uav_readdatavalid (onchip_memory2_s1_agent_m0_readdatavalid), // .readdatavalid
  944. .uav_byteenable (onchip_memory2_s1_agent_m0_byteenable), // .byteenable
  945. .uav_readdata (onchip_memory2_s1_agent_m0_readdata), // .readdata
  946. .uav_writedata (onchip_memory2_s1_agent_m0_writedata), // .writedata
  947. .uav_lock (onchip_memory2_s1_agent_m0_lock), // .lock
  948. .uav_debugaccess (onchip_memory2_s1_agent_m0_debugaccess), // .debugaccess
  949. .av_address (onchip_memory2_s1_address), // avalon_anti_slave_0.address
  950. .av_write (onchip_memory2_s1_write), // .write
  951. .av_readdata (onchip_memory2_s1_readdata), // .readdata
  952. .av_writedata (onchip_memory2_s1_writedata), // .writedata
  953. .av_byteenable (onchip_memory2_s1_byteenable), // .byteenable
  954. .av_chipselect (onchip_memory2_s1_chipselect), // .chipselect
  955. .av_clken (onchip_memory2_s1_clken), // .clken
  956. .av_read (), // (terminated)
  957. .av_begintransfer (), // (terminated)
  958. .av_beginbursttransfer (), // (terminated)
  959. .av_burstcount (), // (terminated)
  960. .av_readdatavalid (1'b0), // (terminated)
  961. .av_waitrequest (1'b0), // (terminated)
  962. .av_writebyteenable (), // (terminated)
  963. .av_lock (), // (terminated)
  964. .uav_clken (1'b0), // (terminated)
  965. .av_debugaccess (), // (terminated)
  966. .av_outputenable (), // (terminated)
  967. .uav_response (), // (terminated)
  968. .av_response (2'b00), // (terminated)
  969. .uav_writeresponsevalid (), // (terminated)
  970. .av_writeresponsevalid (1'b0) // (terminated)
  971. );
  972. altera_merlin_slave_translator #(
  973. .AV_ADDRESS_W (2),
  974. .AV_DATA_W (32),
  975. .UAV_DATA_W (32),
  976. .AV_BURSTCOUNT_W (1),
  977. .AV_BYTEENABLE_W (1),
  978. .UAV_BYTEENABLE_W (4),
  979. .UAV_ADDRESS_W (20),
  980. .UAV_BURSTCOUNT_W (3),
  981. .AV_READLATENCY (0),
  982. .USE_READDATAVALID (0),
  983. .USE_WAITREQUEST (0),
  984. .USE_UAV_CLKEN (0),
  985. .USE_READRESPONSE (0),
  986. .USE_WRITERESPONSE (0),
  987. .AV_SYMBOLS_PER_WORD (4),
  988. .AV_ADDRESS_SYMBOLS (0),
  989. .AV_BURSTCOUNT_SYMBOLS (0),
  990. .AV_CONSTANT_BURST_BEHAVIOR (0),
  991. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  992. .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
  993. .CHIPSELECT_THROUGH_READLATENCY (0),
  994. .AV_READ_WAIT_CYCLES (1),
  995. .AV_WRITE_WAIT_CYCLES (0),
  996. .AV_SETUP_WAIT_CYCLES (0),
  997. .AV_DATA_HOLD_CYCLES (0)
  998. ) pio_led_s1_translator (
  999. .clk (clk_50_clk_clk), // clk.clk
  1000. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  1001. .uav_address (pio_led_s1_agent_m0_address), // avalon_universal_slave_0.address
  1002. .uav_burstcount (pio_led_s1_agent_m0_burstcount), // .burstcount
  1003. .uav_read (pio_led_s1_agent_m0_read), // .read
  1004. .uav_write (pio_led_s1_agent_m0_write), // .write
  1005. .uav_waitrequest (pio_led_s1_agent_m0_waitrequest), // .waitrequest
  1006. .uav_readdatavalid (pio_led_s1_agent_m0_readdatavalid), // .readdatavalid
  1007. .uav_byteenable (pio_led_s1_agent_m0_byteenable), // .byteenable
  1008. .uav_readdata (pio_led_s1_agent_m0_readdata), // .readdata
  1009. .uav_writedata (pio_led_s1_agent_m0_writedata), // .writedata
  1010. .uav_lock (pio_led_s1_agent_m0_lock), // .lock
  1011. .uav_debugaccess (pio_led_s1_agent_m0_debugaccess), // .debugaccess
  1012. .av_address (pio_LED_s1_address), // avalon_anti_slave_0.address
  1013. .av_write (pio_LED_s1_write), // .write
  1014. .av_readdata (pio_LED_s1_readdata), // .readdata
  1015. .av_writedata (pio_LED_s1_writedata), // .writedata
  1016. .av_chipselect (pio_LED_s1_chipselect), // .chipselect
  1017. .av_read (), // (terminated)
  1018. .av_begintransfer (), // (terminated)
  1019. .av_beginbursttransfer (), // (terminated)
  1020. .av_burstcount (), // (terminated)
  1021. .av_byteenable (), // (terminated)
  1022. .av_readdatavalid (1'b0), // (terminated)
  1023. .av_waitrequest (1'b0), // (terminated)
  1024. .av_writebyteenable (), // (terminated)
  1025. .av_lock (), // (terminated)
  1026. .av_clken (), // (terminated)
  1027. .uav_clken (1'b0), // (terminated)
  1028. .av_debugaccess (), // (terminated)
  1029. .av_outputenable (), // (terminated)
  1030. .uav_response (), // (terminated)
  1031. .av_response (2'b00), // (terminated)
  1032. .uav_writeresponsevalid (), // (terminated)
  1033. .av_writeresponsevalid (1'b0) // (terminated)
  1034. );
  1035. altera_merlin_slave_translator #(
  1036. .AV_ADDRESS_W (2),
  1037. .AV_DATA_W (32),
  1038. .UAV_DATA_W (32),
  1039. .AV_BURSTCOUNT_W (1),
  1040. .AV_BYTEENABLE_W (1),
  1041. .UAV_BYTEENABLE_W (4),
  1042. .UAV_ADDRESS_W (20),
  1043. .UAV_BURSTCOUNT_W (3),
  1044. .AV_READLATENCY (0),
  1045. .USE_READDATAVALID (0),
  1046. .USE_WAITREQUEST (0),
  1047. .USE_UAV_CLKEN (0),
  1048. .USE_READRESPONSE (0),
  1049. .USE_WRITERESPONSE (0),
  1050. .AV_SYMBOLS_PER_WORD (4),
  1051. .AV_ADDRESS_SYMBOLS (0),
  1052. .AV_BURSTCOUNT_SYMBOLS (0),
  1053. .AV_CONSTANT_BURST_BEHAVIOR (0),
  1054. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  1055. .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
  1056. .CHIPSELECT_THROUGH_READLATENCY (0),
  1057. .AV_READ_WAIT_CYCLES (1),
  1058. .AV_WRITE_WAIT_CYCLES (0),
  1059. .AV_SETUP_WAIT_CYCLES (0),
  1060. .AV_DATA_HOLD_CYCLES (0)
  1061. ) pio_matrix_s1_translator (
  1062. .clk (clk_50_clk_clk), // clk.clk
  1063. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  1064. .uav_address (pio_matrix_s1_agent_m0_address), // avalon_universal_slave_0.address
  1065. .uav_burstcount (pio_matrix_s1_agent_m0_burstcount), // .burstcount
  1066. .uav_read (pio_matrix_s1_agent_m0_read), // .read
  1067. .uav_write (pio_matrix_s1_agent_m0_write), // .write
  1068. .uav_waitrequest (pio_matrix_s1_agent_m0_waitrequest), // .waitrequest
  1069. .uav_readdatavalid (pio_matrix_s1_agent_m0_readdatavalid), // .readdatavalid
  1070. .uav_byteenable (pio_matrix_s1_agent_m0_byteenable), // .byteenable
  1071. .uav_readdata (pio_matrix_s1_agent_m0_readdata), // .readdata
  1072. .uav_writedata (pio_matrix_s1_agent_m0_writedata), // .writedata
  1073. .uav_lock (pio_matrix_s1_agent_m0_lock), // .lock
  1074. .uav_debugaccess (pio_matrix_s1_agent_m0_debugaccess), // .debugaccess
  1075. .av_address (pio_MATRIX_s1_address), // avalon_anti_slave_0.address
  1076. .av_write (pio_MATRIX_s1_write), // .write
  1077. .av_readdata (pio_MATRIX_s1_readdata), // .readdata
  1078. .av_writedata (pio_MATRIX_s1_writedata), // .writedata
  1079. .av_chipselect (pio_MATRIX_s1_chipselect), // .chipselect
  1080. .av_read (), // (terminated)
  1081. .av_begintransfer (), // (terminated)
  1082. .av_beginbursttransfer (), // (terminated)
  1083. .av_burstcount (), // (terminated)
  1084. .av_byteenable (), // (terminated)
  1085. .av_readdatavalid (1'b0), // (terminated)
  1086. .av_waitrequest (1'b0), // (terminated)
  1087. .av_writebyteenable (), // (terminated)
  1088. .av_lock (), // (terminated)
  1089. .av_clken (), // (terminated)
  1090. .uav_clken (1'b0), // (terminated)
  1091. .av_debugaccess (), // (terminated)
  1092. .av_outputenable (), // (terminated)
  1093. .uav_response (), // (terminated)
  1094. .av_response (2'b00), // (terminated)
  1095. .uav_writeresponsevalid (), // (terminated)
  1096. .av_writeresponsevalid (1'b0) // (terminated)
  1097. );
  1098. altera_merlin_slave_translator #(
  1099. .AV_ADDRESS_W (2),
  1100. .AV_DATA_W (32),
  1101. .UAV_DATA_W (32),
  1102. .AV_BURSTCOUNT_W (1),
  1103. .AV_BYTEENABLE_W (1),
  1104. .UAV_BYTEENABLE_W (4),
  1105. .UAV_ADDRESS_W (20),
  1106. .UAV_BURSTCOUNT_W (3),
  1107. .AV_READLATENCY (0),
  1108. .USE_READDATAVALID (0),
  1109. .USE_WAITREQUEST (0),
  1110. .USE_UAV_CLKEN (0),
  1111. .USE_READRESPONSE (0),
  1112. .USE_WRITERESPONSE (0),
  1113. .AV_SYMBOLS_PER_WORD (4),
  1114. .AV_ADDRESS_SYMBOLS (0),
  1115. .AV_BURSTCOUNT_SYMBOLS (0),
  1116. .AV_CONSTANT_BURST_BEHAVIOR (0),
  1117. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  1118. .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
  1119. .CHIPSELECT_THROUGH_READLATENCY (0),
  1120. .AV_READ_WAIT_CYCLES (1),
  1121. .AV_WRITE_WAIT_CYCLES (0),
  1122. .AV_SETUP_WAIT_CYCLES (0),
  1123. .AV_DATA_HOLD_CYCLES (0)
  1124. ) pio_button_s1_translator (
  1125. .clk (clk_50_clk_clk), // clk.clk
  1126. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  1127. .uav_address (pio_button_s1_agent_m0_address), // avalon_universal_slave_0.address
  1128. .uav_burstcount (pio_button_s1_agent_m0_burstcount), // .burstcount
  1129. .uav_read (pio_button_s1_agent_m0_read), // .read
  1130. .uav_write (pio_button_s1_agent_m0_write), // .write
  1131. .uav_waitrequest (pio_button_s1_agent_m0_waitrequest), // .waitrequest
  1132. .uav_readdatavalid (pio_button_s1_agent_m0_readdatavalid), // .readdatavalid
  1133. .uav_byteenable (pio_button_s1_agent_m0_byteenable), // .byteenable
  1134. .uav_readdata (pio_button_s1_agent_m0_readdata), // .readdata
  1135. .uav_writedata (pio_button_s1_agent_m0_writedata), // .writedata
  1136. .uav_lock (pio_button_s1_agent_m0_lock), // .lock
  1137. .uav_debugaccess (pio_button_s1_agent_m0_debugaccess), // .debugaccess
  1138. .av_address (pio_BUTTON_s1_address), // avalon_anti_slave_0.address
  1139. .av_readdata (pio_BUTTON_s1_readdata), // .readdata
  1140. .av_write (), // (terminated)
  1141. .av_read (), // (terminated)
  1142. .av_writedata (), // (terminated)
  1143. .av_begintransfer (), // (terminated)
  1144. .av_beginbursttransfer (), // (terminated)
  1145. .av_burstcount (), // (terminated)
  1146. .av_byteenable (), // (terminated)
  1147. .av_readdatavalid (1'b0), // (terminated)
  1148. .av_waitrequest (1'b0), // (terminated)
  1149. .av_writebyteenable (), // (terminated)
  1150. .av_lock (), // (terminated)
  1151. .av_chipselect (), // (terminated)
  1152. .av_clken (), // (terminated)
  1153. .uav_clken (1'b0), // (terminated)
  1154. .av_debugaccess (), // (terminated)
  1155. .av_outputenable (), // (terminated)
  1156. .uav_response (), // (terminated)
  1157. .av_response (2'b00), // (terminated)
  1158. .uav_writeresponsevalid (), // (terminated)
  1159. .av_writeresponsevalid (1'b0) // (terminated)
  1160. );
  1161. altera_merlin_master_agent #(
  1162. .PKT_ORI_BURST_SIZE_H (95),
  1163. .PKT_ORI_BURST_SIZE_L (93),
  1164. .PKT_RESPONSE_STATUS_H (92),
  1165. .PKT_RESPONSE_STATUS_L (91),
  1166. .PKT_QOS_H (76),
  1167. .PKT_QOS_L (76),
  1168. .PKT_DATA_SIDEBAND_H (74),
  1169. .PKT_DATA_SIDEBAND_L (74),
  1170. .PKT_ADDR_SIDEBAND_H (73),
  1171. .PKT_ADDR_SIDEBAND_L (73),
  1172. .PKT_BURST_TYPE_H (72),
  1173. .PKT_BURST_TYPE_L (71),
  1174. .PKT_CACHE_H (90),
  1175. .PKT_CACHE_L (87),
  1176. .PKT_THREAD_ID_H (83),
  1177. .PKT_THREAD_ID_L (83),
  1178. .PKT_BURST_SIZE_H (70),
  1179. .PKT_BURST_SIZE_L (68),
  1180. .PKT_TRANS_EXCLUSIVE (61),
  1181. .PKT_TRANS_LOCK (60),
  1182. .PKT_BEGIN_BURST (75),
  1183. .PKT_PROTECTION_H (86),
  1184. .PKT_PROTECTION_L (84),
  1185. .PKT_BURSTWRAP_H (67),
  1186. .PKT_BURSTWRAP_L (65),
  1187. .PKT_BYTE_CNT_H (64),
  1188. .PKT_BYTE_CNT_L (62),
  1189. .PKT_ADDR_H (55),
  1190. .PKT_ADDR_L (36),
  1191. .PKT_TRANS_COMPRESSED_READ (56),
  1192. .PKT_TRANS_POSTED (57),
  1193. .PKT_TRANS_WRITE (58),
  1194. .PKT_TRANS_READ (59),
  1195. .PKT_DATA_H (31),
  1196. .PKT_DATA_L (0),
  1197. .PKT_BYTEEN_H (35),
  1198. .PKT_BYTEEN_L (32),
  1199. .PKT_SRC_ID_H (79),
  1200. .PKT_SRC_ID_L (77),
  1201. .PKT_DEST_ID_H (82),
  1202. .PKT_DEST_ID_L (80),
  1203. .ST_DATA_W (96),
  1204. .ST_CHANNEL_W (7),
  1205. .AV_BURSTCOUNT_W (3),
  1206. .SUPPRESS_0_BYTEEN_RSP (0),
  1207. .ID (0),
  1208. .BURSTWRAP_VALUE (7),
  1209. .CACHE_VALUE (0),
  1210. .SECURE_ACCESS_BIT (1),
  1211. .USE_READRESPONSE (0),
  1212. .USE_WRITERESPONSE (0)
  1213. ) nios2_data_master_agent (
  1214. .clk (clk_50_clk_clk), // clk.clk
  1215. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1216. .av_address (nios2_data_master_translator_avalon_universal_master_0_address), // av.address
  1217. .av_write (nios2_data_master_translator_avalon_universal_master_0_write), // .write
  1218. .av_read (nios2_data_master_translator_avalon_universal_master_0_read), // .read
  1219. .av_writedata (nios2_data_master_translator_avalon_universal_master_0_writedata), // .writedata
  1220. .av_readdata (nios2_data_master_translator_avalon_universal_master_0_readdata), // .readdata
  1221. .av_waitrequest (nios2_data_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest
  1222. .av_readdatavalid (nios2_data_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid
  1223. .av_byteenable (nios2_data_master_translator_avalon_universal_master_0_byteenable), // .byteenable
  1224. .av_burstcount (nios2_data_master_translator_avalon_universal_master_0_burstcount), // .burstcount
  1225. .av_debugaccess (nios2_data_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess
  1226. .av_lock (nios2_data_master_translator_avalon_universal_master_0_lock), // .lock
  1227. .cp_valid (nios2_data_master_agent_cp_valid), // cp.valid
  1228. .cp_data (nios2_data_master_agent_cp_data), // .data
  1229. .cp_startofpacket (nios2_data_master_agent_cp_startofpacket), // .startofpacket
  1230. .cp_endofpacket (nios2_data_master_agent_cp_endofpacket), // .endofpacket
  1231. .cp_ready (nios2_data_master_agent_cp_ready), // .ready
  1232. .rp_valid (rsp_mux_src_valid), // rp.valid
  1233. .rp_data (rsp_mux_src_data), // .data
  1234. .rp_channel (rsp_mux_src_channel), // .channel
  1235. .rp_startofpacket (rsp_mux_src_startofpacket), // .startofpacket
  1236. .rp_endofpacket (rsp_mux_src_endofpacket), // .endofpacket
  1237. .rp_ready (rsp_mux_src_ready), // .ready
  1238. .av_response (), // (terminated)
  1239. .av_writeresponsevalid () // (terminated)
  1240. );
  1241. altera_merlin_master_agent #(
  1242. .PKT_ORI_BURST_SIZE_H (95),
  1243. .PKT_ORI_BURST_SIZE_L (93),
  1244. .PKT_RESPONSE_STATUS_H (92),
  1245. .PKT_RESPONSE_STATUS_L (91),
  1246. .PKT_QOS_H (76),
  1247. .PKT_QOS_L (76),
  1248. .PKT_DATA_SIDEBAND_H (74),
  1249. .PKT_DATA_SIDEBAND_L (74),
  1250. .PKT_ADDR_SIDEBAND_H (73),
  1251. .PKT_ADDR_SIDEBAND_L (73),
  1252. .PKT_BURST_TYPE_H (72),
  1253. .PKT_BURST_TYPE_L (71),
  1254. .PKT_CACHE_H (90),
  1255. .PKT_CACHE_L (87),
  1256. .PKT_THREAD_ID_H (83),
  1257. .PKT_THREAD_ID_L (83),
  1258. .PKT_BURST_SIZE_H (70),
  1259. .PKT_BURST_SIZE_L (68),
  1260. .PKT_TRANS_EXCLUSIVE (61),
  1261. .PKT_TRANS_LOCK (60),
  1262. .PKT_BEGIN_BURST (75),
  1263. .PKT_PROTECTION_H (86),
  1264. .PKT_PROTECTION_L (84),
  1265. .PKT_BURSTWRAP_H (67),
  1266. .PKT_BURSTWRAP_L (65),
  1267. .PKT_BYTE_CNT_H (64),
  1268. .PKT_BYTE_CNT_L (62),
  1269. .PKT_ADDR_H (55),
  1270. .PKT_ADDR_L (36),
  1271. .PKT_TRANS_COMPRESSED_READ (56),
  1272. .PKT_TRANS_POSTED (57),
  1273. .PKT_TRANS_WRITE (58),
  1274. .PKT_TRANS_READ (59),
  1275. .PKT_DATA_H (31),
  1276. .PKT_DATA_L (0),
  1277. .PKT_BYTEEN_H (35),
  1278. .PKT_BYTEEN_L (32),
  1279. .PKT_SRC_ID_H (79),
  1280. .PKT_SRC_ID_L (77),
  1281. .PKT_DEST_ID_H (82),
  1282. .PKT_DEST_ID_L (80),
  1283. .ST_DATA_W (96),
  1284. .ST_CHANNEL_W (7),
  1285. .AV_BURSTCOUNT_W (3),
  1286. .SUPPRESS_0_BYTEEN_RSP (0),
  1287. .ID (1),
  1288. .BURSTWRAP_VALUE (3),
  1289. .CACHE_VALUE (0),
  1290. .SECURE_ACCESS_BIT (1),
  1291. .USE_READRESPONSE (0),
  1292. .USE_WRITERESPONSE (0)
  1293. ) nios2_instruction_master_agent (
  1294. .clk (clk_50_clk_clk), // clk.clk
  1295. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1296. .av_address (nios2_instruction_master_translator_avalon_universal_master_0_address), // av.address
  1297. .av_write (nios2_instruction_master_translator_avalon_universal_master_0_write), // .write
  1298. .av_read (nios2_instruction_master_translator_avalon_universal_master_0_read), // .read
  1299. .av_writedata (nios2_instruction_master_translator_avalon_universal_master_0_writedata), // .writedata
  1300. .av_readdata (nios2_instruction_master_translator_avalon_universal_master_0_readdata), // .readdata
  1301. .av_waitrequest (nios2_instruction_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest
  1302. .av_readdatavalid (nios2_instruction_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid
  1303. .av_byteenable (nios2_instruction_master_translator_avalon_universal_master_0_byteenable), // .byteenable
  1304. .av_burstcount (nios2_instruction_master_translator_avalon_universal_master_0_burstcount), // .burstcount
  1305. .av_debugaccess (nios2_instruction_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess
  1306. .av_lock (nios2_instruction_master_translator_avalon_universal_master_0_lock), // .lock
  1307. .cp_valid (nios2_instruction_master_agent_cp_valid), // cp.valid
  1308. .cp_data (nios2_instruction_master_agent_cp_data), // .data
  1309. .cp_startofpacket (nios2_instruction_master_agent_cp_startofpacket), // .startofpacket
  1310. .cp_endofpacket (nios2_instruction_master_agent_cp_endofpacket), // .endofpacket
  1311. .cp_ready (nios2_instruction_master_agent_cp_ready), // .ready
  1312. .rp_valid (rsp_mux_001_src_valid), // rp.valid
  1313. .rp_data (rsp_mux_001_src_data), // .data
  1314. .rp_channel (rsp_mux_001_src_channel), // .channel
  1315. .rp_startofpacket (rsp_mux_001_src_startofpacket), // .startofpacket
  1316. .rp_endofpacket (rsp_mux_001_src_endofpacket), // .endofpacket
  1317. .rp_ready (rsp_mux_001_src_ready), // .ready
  1318. .av_response (), // (terminated)
  1319. .av_writeresponsevalid () // (terminated)
  1320. );
  1321. altera_merlin_slave_agent #(
  1322. .PKT_ORI_BURST_SIZE_H (95),
  1323. .PKT_ORI_BURST_SIZE_L (93),
  1324. .PKT_RESPONSE_STATUS_H (92),
  1325. .PKT_RESPONSE_STATUS_L (91),
  1326. .PKT_BURST_SIZE_H (70),
  1327. .PKT_BURST_SIZE_L (68),
  1328. .PKT_TRANS_LOCK (60),
  1329. .PKT_BEGIN_BURST (75),
  1330. .PKT_PROTECTION_H (86),
  1331. .PKT_PROTECTION_L (84),
  1332. .PKT_BURSTWRAP_H (67),
  1333. .PKT_BURSTWRAP_L (65),
  1334. .PKT_BYTE_CNT_H (64),
  1335. .PKT_BYTE_CNT_L (62),
  1336. .PKT_ADDR_H (55),
  1337. .PKT_ADDR_L (36),
  1338. .PKT_TRANS_COMPRESSED_READ (56),
  1339. .PKT_TRANS_POSTED (57),
  1340. .PKT_TRANS_WRITE (58),
  1341. .PKT_TRANS_READ (59),
  1342. .PKT_DATA_H (31),
  1343. .PKT_DATA_L (0),
  1344. .PKT_BYTEEN_H (35),
  1345. .PKT_BYTEEN_L (32),
  1346. .PKT_SRC_ID_H (79),
  1347. .PKT_SRC_ID_L (77),
  1348. .PKT_DEST_ID_H (82),
  1349. .PKT_DEST_ID_L (80),
  1350. .PKT_SYMBOL_W (8),
  1351. .ST_CHANNEL_W (7),
  1352. .ST_DATA_W (96),
  1353. .AVS_BURSTCOUNT_W (3),
  1354. .SUPPRESS_0_BYTEEN_CMD (0),
  1355. .PREVENT_FIFO_OVERFLOW (1),
  1356. .USE_READRESPONSE (0),
  1357. .USE_WRITERESPONSE (0),
  1358. .ECC_ENABLE (0)
  1359. ) jtag_uart_avalon_jtag_slave_agent (
  1360. .clk (clk_50_clk_clk), // clk.clk
  1361. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1362. .m0_address (jtag_uart_avalon_jtag_slave_agent_m0_address), // m0.address
  1363. .m0_burstcount (jtag_uart_avalon_jtag_slave_agent_m0_burstcount), // .burstcount
  1364. .m0_byteenable (jtag_uart_avalon_jtag_slave_agent_m0_byteenable), // .byteenable
  1365. .m0_debugaccess (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess), // .debugaccess
  1366. .m0_lock (jtag_uart_avalon_jtag_slave_agent_m0_lock), // .lock
  1367. .m0_readdata (jtag_uart_avalon_jtag_slave_agent_m0_readdata), // .readdata
  1368. .m0_readdatavalid (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid), // .readdatavalid
  1369. .m0_read (jtag_uart_avalon_jtag_slave_agent_m0_read), // .read
  1370. .m0_waitrequest (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest), // .waitrequest
  1371. .m0_writedata (jtag_uart_avalon_jtag_slave_agent_m0_writedata), // .writedata
  1372. .m0_write (jtag_uart_avalon_jtag_slave_agent_m0_write), // .write
  1373. .rp_endofpacket (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket), // rp.endofpacket
  1374. .rp_ready (jtag_uart_avalon_jtag_slave_agent_rp_ready), // .ready
  1375. .rp_valid (jtag_uart_avalon_jtag_slave_agent_rp_valid), // .valid
  1376. .rp_data (jtag_uart_avalon_jtag_slave_agent_rp_data), // .data
  1377. .rp_startofpacket (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket), // .startofpacket
  1378. .cp_ready (cmd_mux_src_ready), // cp.ready
  1379. .cp_valid (cmd_mux_src_valid), // .valid
  1380. .cp_data (cmd_mux_src_data), // .data
  1381. .cp_startofpacket (cmd_mux_src_startofpacket), // .startofpacket
  1382. .cp_endofpacket (cmd_mux_src_endofpacket), // .endofpacket
  1383. .cp_channel (cmd_mux_src_channel), // .channel
  1384. .rf_sink_ready (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready), // rf_sink.ready
  1385. .rf_sink_valid (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid), // .valid
  1386. .rf_sink_startofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1387. .rf_sink_endofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1388. .rf_sink_data (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data), // .data
  1389. .rf_source_ready (jtag_uart_avalon_jtag_slave_agent_rf_source_ready), // rf_source.ready
  1390. .rf_source_valid (jtag_uart_avalon_jtag_slave_agent_rf_source_valid), // .valid
  1391. .rf_source_startofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket), // .startofpacket
  1392. .rf_source_endofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket), // .endofpacket
  1393. .rf_source_data (jtag_uart_avalon_jtag_slave_agent_rf_source_data), // .data
  1394. .rdata_fifo_sink_ready (avalon_st_adapter_out_0_ready), // rdata_fifo_sink.ready
  1395. .rdata_fifo_sink_valid (avalon_st_adapter_out_0_valid), // .valid
  1396. .rdata_fifo_sink_data (avalon_st_adapter_out_0_data), // .data
  1397. .rdata_fifo_sink_error (avalon_st_adapter_out_0_error), // .error
  1398. .rdata_fifo_src_ready (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready
  1399. .rdata_fifo_src_valid (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid), // .valid
  1400. .rdata_fifo_src_data (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data), // .data
  1401. .m0_response (2'b00), // (terminated)
  1402. .m0_writeresponsevalid (1'b0) // (terminated)
  1403. );
  1404. altera_avalon_sc_fifo #(
  1405. .SYMBOLS_PER_BEAT (1),
  1406. .BITS_PER_SYMBOL (97),
  1407. .FIFO_DEPTH (2),
  1408. .CHANNEL_WIDTH (0),
  1409. .ERROR_WIDTH (0),
  1410. .USE_PACKETS (1),
  1411. .USE_FILL_LEVEL (0),
  1412. .EMPTY_LATENCY (1),
  1413. .USE_MEMORY_BLOCKS (0),
  1414. .USE_STORE_FORWARD (0),
  1415. .USE_ALMOST_FULL_IF (0),
  1416. .USE_ALMOST_EMPTY_IF (0)
  1417. ) jtag_uart_avalon_jtag_slave_agent_rsp_fifo (
  1418. .clk (clk_50_clk_clk), // clk.clk
  1419. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1420. .in_data (jtag_uart_avalon_jtag_slave_agent_rf_source_data), // in.data
  1421. .in_valid (jtag_uart_avalon_jtag_slave_agent_rf_source_valid), // .valid
  1422. .in_ready (jtag_uart_avalon_jtag_slave_agent_rf_source_ready), // .ready
  1423. .in_startofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket), // .startofpacket
  1424. .in_endofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket), // .endofpacket
  1425. .out_data (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data), // out.data
  1426. .out_valid (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid), // .valid
  1427. .out_ready (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready), // .ready
  1428. .out_startofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1429. .out_endofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1430. .csr_address (2'b00), // (terminated)
  1431. .csr_read (1'b0), // (terminated)
  1432. .csr_write (1'b0), // (terminated)
  1433. .csr_readdata (), // (terminated)
  1434. .csr_writedata (32'b00000000000000000000000000000000), // (terminated)
  1435. .almost_full_data (), // (terminated)
  1436. .almost_empty_data (), // (terminated)
  1437. .in_empty (1'b0), // (terminated)
  1438. .out_empty (), // (terminated)
  1439. .in_error (1'b0), // (terminated)
  1440. .out_error (), // (terminated)
  1441. .in_channel (1'b0), // (terminated)
  1442. .out_channel () // (terminated)
  1443. );
  1444. altera_merlin_slave_agent #(
  1445. .PKT_ORI_BURST_SIZE_H (95),
  1446. .PKT_ORI_BURST_SIZE_L (93),
  1447. .PKT_RESPONSE_STATUS_H (92),
  1448. .PKT_RESPONSE_STATUS_L (91),
  1449. .PKT_BURST_SIZE_H (70),
  1450. .PKT_BURST_SIZE_L (68),
  1451. .PKT_TRANS_LOCK (60),
  1452. .PKT_BEGIN_BURST (75),
  1453. .PKT_PROTECTION_H (86),
  1454. .PKT_PROTECTION_L (84),
  1455. .PKT_BURSTWRAP_H (67),
  1456. .PKT_BURSTWRAP_L (65),
  1457. .PKT_BYTE_CNT_H (64),
  1458. .PKT_BYTE_CNT_L (62),
  1459. .PKT_ADDR_H (55),
  1460. .PKT_ADDR_L (36),
  1461. .PKT_TRANS_COMPRESSED_READ (56),
  1462. .PKT_TRANS_POSTED (57),
  1463. .PKT_TRANS_WRITE (58),
  1464. .PKT_TRANS_READ (59),
  1465. .PKT_DATA_H (31),
  1466. .PKT_DATA_L (0),
  1467. .PKT_BYTEEN_H (35),
  1468. .PKT_BYTEEN_L (32),
  1469. .PKT_SRC_ID_H (79),
  1470. .PKT_SRC_ID_L (77),
  1471. .PKT_DEST_ID_H (82),
  1472. .PKT_DEST_ID_L (80),
  1473. .PKT_SYMBOL_W (8),
  1474. .ST_CHANNEL_W (7),
  1475. .ST_DATA_W (96),
  1476. .AVS_BURSTCOUNT_W (3),
  1477. .SUPPRESS_0_BYTEEN_CMD (0),
  1478. .PREVENT_FIFO_OVERFLOW (1),
  1479. .USE_READRESPONSE (0),
  1480. .USE_WRITERESPONSE (0),
  1481. .ECC_ENABLE (0)
  1482. ) lcd_16207_control_slave_agent (
  1483. .clk (clk_50_clk_clk), // clk.clk
  1484. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1485. .m0_address (lcd_16207_control_slave_agent_m0_address), // m0.address
  1486. .m0_burstcount (lcd_16207_control_slave_agent_m0_burstcount), // .burstcount
  1487. .m0_byteenable (lcd_16207_control_slave_agent_m0_byteenable), // .byteenable
  1488. .m0_debugaccess (lcd_16207_control_slave_agent_m0_debugaccess), // .debugaccess
  1489. .m0_lock (lcd_16207_control_slave_agent_m0_lock), // .lock
  1490. .m0_readdata (lcd_16207_control_slave_agent_m0_readdata), // .readdata
  1491. .m0_readdatavalid (lcd_16207_control_slave_agent_m0_readdatavalid), // .readdatavalid
  1492. .m0_read (lcd_16207_control_slave_agent_m0_read), // .read
  1493. .m0_waitrequest (lcd_16207_control_slave_agent_m0_waitrequest), // .waitrequest
  1494. .m0_writedata (lcd_16207_control_slave_agent_m0_writedata), // .writedata
  1495. .m0_write (lcd_16207_control_slave_agent_m0_write), // .write
  1496. .rp_endofpacket (lcd_16207_control_slave_agent_rp_endofpacket), // rp.endofpacket
  1497. .rp_ready (lcd_16207_control_slave_agent_rp_ready), // .ready
  1498. .rp_valid (lcd_16207_control_slave_agent_rp_valid), // .valid
  1499. .rp_data (lcd_16207_control_slave_agent_rp_data), // .data
  1500. .rp_startofpacket (lcd_16207_control_slave_agent_rp_startofpacket), // .startofpacket
  1501. .cp_ready (cmd_mux_001_src_ready), // cp.ready
  1502. .cp_valid (cmd_mux_001_src_valid), // .valid
  1503. .cp_data (cmd_mux_001_src_data), // .data
  1504. .cp_startofpacket (cmd_mux_001_src_startofpacket), // .startofpacket
  1505. .cp_endofpacket (cmd_mux_001_src_endofpacket), // .endofpacket
  1506. .cp_channel (cmd_mux_001_src_channel), // .channel
  1507. .rf_sink_ready (lcd_16207_control_slave_agent_rsp_fifo_out_ready), // rf_sink.ready
  1508. .rf_sink_valid (lcd_16207_control_slave_agent_rsp_fifo_out_valid), // .valid
  1509. .rf_sink_startofpacket (lcd_16207_control_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1510. .rf_sink_endofpacket (lcd_16207_control_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1511. .rf_sink_data (lcd_16207_control_slave_agent_rsp_fifo_out_data), // .data
  1512. .rf_source_ready (lcd_16207_control_slave_agent_rf_source_ready), // rf_source.ready
  1513. .rf_source_valid (lcd_16207_control_slave_agent_rf_source_valid), // .valid
  1514. .rf_source_startofpacket (lcd_16207_control_slave_agent_rf_source_startofpacket), // .startofpacket
  1515. .rf_source_endofpacket (lcd_16207_control_slave_agent_rf_source_endofpacket), // .endofpacket
  1516. .rf_source_data (lcd_16207_control_slave_agent_rf_source_data), // .data
  1517. .rdata_fifo_sink_ready (avalon_st_adapter_001_out_0_ready), // rdata_fifo_sink.ready
  1518. .rdata_fifo_sink_valid (avalon_st_adapter_001_out_0_valid), // .valid
  1519. .rdata_fifo_sink_data (avalon_st_adapter_001_out_0_data), // .data
  1520. .rdata_fifo_sink_error (avalon_st_adapter_001_out_0_error), // .error
  1521. .rdata_fifo_src_ready (lcd_16207_control_slave_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready
  1522. .rdata_fifo_src_valid (lcd_16207_control_slave_agent_rdata_fifo_src_valid), // .valid
  1523. .rdata_fifo_src_data (lcd_16207_control_slave_agent_rdata_fifo_src_data), // .data
  1524. .m0_response (2'b00), // (terminated)
  1525. .m0_writeresponsevalid (1'b0) // (terminated)
  1526. );
  1527. altera_avalon_sc_fifo #(
  1528. .SYMBOLS_PER_BEAT (1),
  1529. .BITS_PER_SYMBOL (97),
  1530. .FIFO_DEPTH (2),
  1531. .CHANNEL_WIDTH (0),
  1532. .ERROR_WIDTH (0),
  1533. .USE_PACKETS (1),
  1534. .USE_FILL_LEVEL (0),
  1535. .EMPTY_LATENCY (1),
  1536. .USE_MEMORY_BLOCKS (0),
  1537. .USE_STORE_FORWARD (0),
  1538. .USE_ALMOST_FULL_IF (0),
  1539. .USE_ALMOST_EMPTY_IF (0)
  1540. ) lcd_16207_control_slave_agent_rsp_fifo (
  1541. .clk (clk_50_clk_clk), // clk.clk
  1542. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1543. .in_data (lcd_16207_control_slave_agent_rf_source_data), // in.data
  1544. .in_valid (lcd_16207_control_slave_agent_rf_source_valid), // .valid
  1545. .in_ready (lcd_16207_control_slave_agent_rf_source_ready), // .ready
  1546. .in_startofpacket (lcd_16207_control_slave_agent_rf_source_startofpacket), // .startofpacket
  1547. .in_endofpacket (lcd_16207_control_slave_agent_rf_source_endofpacket), // .endofpacket
  1548. .out_data (lcd_16207_control_slave_agent_rsp_fifo_out_data), // out.data
  1549. .out_valid (lcd_16207_control_slave_agent_rsp_fifo_out_valid), // .valid
  1550. .out_ready (lcd_16207_control_slave_agent_rsp_fifo_out_ready), // .ready
  1551. .out_startofpacket (lcd_16207_control_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1552. .out_endofpacket (lcd_16207_control_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1553. .csr_address (2'b00), // (terminated)
  1554. .csr_read (1'b0), // (terminated)
  1555. .csr_write (1'b0), // (terminated)
  1556. .csr_readdata (), // (terminated)
  1557. .csr_writedata (32'b00000000000000000000000000000000), // (terminated)
  1558. .almost_full_data (), // (terminated)
  1559. .almost_empty_data (), // (terminated)
  1560. .in_empty (1'b0), // (terminated)
  1561. .out_empty (), // (terminated)
  1562. .in_error (1'b0), // (terminated)
  1563. .out_error (), // (terminated)
  1564. .in_channel (1'b0), // (terminated)
  1565. .out_channel () // (terminated)
  1566. );
  1567. altera_merlin_slave_agent #(
  1568. .PKT_ORI_BURST_SIZE_H (95),
  1569. .PKT_ORI_BURST_SIZE_L (93),
  1570. .PKT_RESPONSE_STATUS_H (92),
  1571. .PKT_RESPONSE_STATUS_L (91),
  1572. .PKT_BURST_SIZE_H (70),
  1573. .PKT_BURST_SIZE_L (68),
  1574. .PKT_TRANS_LOCK (60),
  1575. .PKT_BEGIN_BURST (75),
  1576. .PKT_PROTECTION_H (86),
  1577. .PKT_PROTECTION_L (84),
  1578. .PKT_BURSTWRAP_H (67),
  1579. .PKT_BURSTWRAP_L (65),
  1580. .PKT_BYTE_CNT_H (64),
  1581. .PKT_BYTE_CNT_L (62),
  1582. .PKT_ADDR_H (55),
  1583. .PKT_ADDR_L (36),
  1584. .PKT_TRANS_COMPRESSED_READ (56),
  1585. .PKT_TRANS_POSTED (57),
  1586. .PKT_TRANS_WRITE (58),
  1587. .PKT_TRANS_READ (59),
  1588. .PKT_DATA_H (31),
  1589. .PKT_DATA_L (0),
  1590. .PKT_BYTEEN_H (35),
  1591. .PKT_BYTEEN_L (32),
  1592. .PKT_SRC_ID_H (79),
  1593. .PKT_SRC_ID_L (77),
  1594. .PKT_DEST_ID_H (82),
  1595. .PKT_DEST_ID_L (80),
  1596. .PKT_SYMBOL_W (8),
  1597. .ST_CHANNEL_W (7),
  1598. .ST_DATA_W (96),
  1599. .AVS_BURSTCOUNT_W (3),
  1600. .SUPPRESS_0_BYTEEN_CMD (0),
  1601. .PREVENT_FIFO_OVERFLOW (1),
  1602. .USE_READRESPONSE (0),
  1603. .USE_WRITERESPONSE (0),
  1604. .ECC_ENABLE (0)
  1605. ) nios2_debug_mem_slave_agent (
  1606. .clk (clk_50_clk_clk), // clk.clk
  1607. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1608. .m0_address (nios2_debug_mem_slave_agent_m0_address), // m0.address
  1609. .m0_burstcount (nios2_debug_mem_slave_agent_m0_burstcount), // .burstcount
  1610. .m0_byteenable (nios2_debug_mem_slave_agent_m0_byteenable), // .byteenable
  1611. .m0_debugaccess (nios2_debug_mem_slave_agent_m0_debugaccess), // .debugaccess
  1612. .m0_lock (nios2_debug_mem_slave_agent_m0_lock), // .lock
  1613. .m0_readdata (nios2_debug_mem_slave_agent_m0_readdata), // .readdata
  1614. .m0_readdatavalid (nios2_debug_mem_slave_agent_m0_readdatavalid), // .readdatavalid
  1615. .m0_read (nios2_debug_mem_slave_agent_m0_read), // .read
  1616. .m0_waitrequest (nios2_debug_mem_slave_agent_m0_waitrequest), // .waitrequest
  1617. .m0_writedata (nios2_debug_mem_slave_agent_m0_writedata), // .writedata
  1618. .m0_write (nios2_debug_mem_slave_agent_m0_write), // .write
  1619. .rp_endofpacket (nios2_debug_mem_slave_agent_rp_endofpacket), // rp.endofpacket
  1620. .rp_ready (nios2_debug_mem_slave_agent_rp_ready), // .ready
  1621. .rp_valid (nios2_debug_mem_slave_agent_rp_valid), // .valid
  1622. .rp_data (nios2_debug_mem_slave_agent_rp_data), // .data
  1623. .rp_startofpacket (nios2_debug_mem_slave_agent_rp_startofpacket), // .startofpacket
  1624. .cp_ready (cmd_mux_002_src_ready), // cp.ready
  1625. .cp_valid (cmd_mux_002_src_valid), // .valid
  1626. .cp_data (cmd_mux_002_src_data), // .data
  1627. .cp_startofpacket (cmd_mux_002_src_startofpacket), // .startofpacket
  1628. .cp_endofpacket (cmd_mux_002_src_endofpacket), // .endofpacket
  1629. .cp_channel (cmd_mux_002_src_channel), // .channel
  1630. .rf_sink_ready (nios2_debug_mem_slave_agent_rsp_fifo_out_ready), // rf_sink.ready
  1631. .rf_sink_valid (nios2_debug_mem_slave_agent_rsp_fifo_out_valid), // .valid
  1632. .rf_sink_startofpacket (nios2_debug_mem_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1633. .rf_sink_endofpacket (nios2_debug_mem_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1634. .rf_sink_data (nios2_debug_mem_slave_agent_rsp_fifo_out_data), // .data
  1635. .rf_source_ready (nios2_debug_mem_slave_agent_rf_source_ready), // rf_source.ready
  1636. .rf_source_valid (nios2_debug_mem_slave_agent_rf_source_valid), // .valid
  1637. .rf_source_startofpacket (nios2_debug_mem_slave_agent_rf_source_startofpacket), // .startofpacket
  1638. .rf_source_endofpacket (nios2_debug_mem_slave_agent_rf_source_endofpacket), // .endofpacket
  1639. .rf_source_data (nios2_debug_mem_slave_agent_rf_source_data), // .data
  1640. .rdata_fifo_sink_ready (avalon_st_adapter_002_out_0_ready), // rdata_fifo_sink.ready
  1641. .rdata_fifo_sink_valid (avalon_st_adapter_002_out_0_valid), // .valid
  1642. .rdata_fifo_sink_data (avalon_st_adapter_002_out_0_data), // .data
  1643. .rdata_fifo_sink_error (avalon_st_adapter_002_out_0_error), // .error
  1644. .rdata_fifo_src_ready (nios2_debug_mem_slave_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready
  1645. .rdata_fifo_src_valid (nios2_debug_mem_slave_agent_rdata_fifo_src_valid), // .valid
  1646. .rdata_fifo_src_data (nios2_debug_mem_slave_agent_rdata_fifo_src_data), // .data
  1647. .m0_response (2'b00), // (terminated)
  1648. .m0_writeresponsevalid (1'b0) // (terminated)
  1649. );
  1650. altera_avalon_sc_fifo #(
  1651. .SYMBOLS_PER_BEAT (1),
  1652. .BITS_PER_SYMBOL (97),
  1653. .FIFO_DEPTH (2),
  1654. .CHANNEL_WIDTH (0),
  1655. .ERROR_WIDTH (0),
  1656. .USE_PACKETS (1),
  1657. .USE_FILL_LEVEL (0),
  1658. .EMPTY_LATENCY (1),
  1659. .USE_MEMORY_BLOCKS (0),
  1660. .USE_STORE_FORWARD (0),
  1661. .USE_ALMOST_FULL_IF (0),
  1662. .USE_ALMOST_EMPTY_IF (0)
  1663. ) nios2_debug_mem_slave_agent_rsp_fifo (
  1664. .clk (clk_50_clk_clk), // clk.clk
  1665. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1666. .in_data (nios2_debug_mem_slave_agent_rf_source_data), // in.data
  1667. .in_valid (nios2_debug_mem_slave_agent_rf_source_valid), // .valid
  1668. .in_ready (nios2_debug_mem_slave_agent_rf_source_ready), // .ready
  1669. .in_startofpacket (nios2_debug_mem_slave_agent_rf_source_startofpacket), // .startofpacket
  1670. .in_endofpacket (nios2_debug_mem_slave_agent_rf_source_endofpacket), // .endofpacket
  1671. .out_data (nios2_debug_mem_slave_agent_rsp_fifo_out_data), // out.data
  1672. .out_valid (nios2_debug_mem_slave_agent_rsp_fifo_out_valid), // .valid
  1673. .out_ready (nios2_debug_mem_slave_agent_rsp_fifo_out_ready), // .ready
  1674. .out_startofpacket (nios2_debug_mem_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1675. .out_endofpacket (nios2_debug_mem_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1676. .csr_address (2'b00), // (terminated)
  1677. .csr_read (1'b0), // (terminated)
  1678. .csr_write (1'b0), // (terminated)
  1679. .csr_readdata (), // (terminated)
  1680. .csr_writedata (32'b00000000000000000000000000000000), // (terminated)
  1681. .almost_full_data (), // (terminated)
  1682. .almost_empty_data (), // (terminated)
  1683. .in_empty (1'b0), // (terminated)
  1684. .out_empty (), // (terminated)
  1685. .in_error (1'b0), // (terminated)
  1686. .out_error (), // (terminated)
  1687. .in_channel (1'b0), // (terminated)
  1688. .out_channel () // (terminated)
  1689. );
  1690. altera_merlin_slave_agent #(
  1691. .PKT_ORI_BURST_SIZE_H (95),
  1692. .PKT_ORI_BURST_SIZE_L (93),
  1693. .PKT_RESPONSE_STATUS_H (92),
  1694. .PKT_RESPONSE_STATUS_L (91),
  1695. .PKT_BURST_SIZE_H (70),
  1696. .PKT_BURST_SIZE_L (68),
  1697. .PKT_TRANS_LOCK (60),
  1698. .PKT_BEGIN_BURST (75),
  1699. .PKT_PROTECTION_H (86),
  1700. .PKT_PROTECTION_L (84),
  1701. .PKT_BURSTWRAP_H (67),
  1702. .PKT_BURSTWRAP_L (65),
  1703. .PKT_BYTE_CNT_H (64),
  1704. .PKT_BYTE_CNT_L (62),
  1705. .PKT_ADDR_H (55),
  1706. .PKT_ADDR_L (36),
  1707. .PKT_TRANS_COMPRESSED_READ (56),
  1708. .PKT_TRANS_POSTED (57),
  1709. .PKT_TRANS_WRITE (58),
  1710. .PKT_TRANS_READ (59),
  1711. .PKT_DATA_H (31),
  1712. .PKT_DATA_L (0),
  1713. .PKT_BYTEEN_H (35),
  1714. .PKT_BYTEEN_L (32),
  1715. .PKT_SRC_ID_H (79),
  1716. .PKT_SRC_ID_L (77),
  1717. .PKT_DEST_ID_H (82),
  1718. .PKT_DEST_ID_L (80),
  1719. .PKT_SYMBOL_W (8),
  1720. .ST_CHANNEL_W (7),
  1721. .ST_DATA_W (96),
  1722. .AVS_BURSTCOUNT_W (3),
  1723. .SUPPRESS_0_BYTEEN_CMD (0),
  1724. .PREVENT_FIFO_OVERFLOW (1),
  1725. .USE_READRESPONSE (0),
  1726. .USE_WRITERESPONSE (0),
  1727. .ECC_ENABLE (0)
  1728. ) onchip_memory2_s1_agent (
  1729. .clk (clk_50_clk_clk), // clk.clk
  1730. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1731. .m0_address (onchip_memory2_s1_agent_m0_address), // m0.address
  1732. .m0_burstcount (onchip_memory2_s1_agent_m0_burstcount), // .burstcount
  1733. .m0_byteenable (onchip_memory2_s1_agent_m0_byteenable), // .byteenable
  1734. .m0_debugaccess (onchip_memory2_s1_agent_m0_debugaccess), // .debugaccess
  1735. .m0_lock (onchip_memory2_s1_agent_m0_lock), // .lock
  1736. .m0_readdata (onchip_memory2_s1_agent_m0_readdata), // .readdata
  1737. .m0_readdatavalid (onchip_memory2_s1_agent_m0_readdatavalid), // .readdatavalid
  1738. .m0_read (onchip_memory2_s1_agent_m0_read), // .read
  1739. .m0_waitrequest (onchip_memory2_s1_agent_m0_waitrequest), // .waitrequest
  1740. .m0_writedata (onchip_memory2_s1_agent_m0_writedata), // .writedata
  1741. .m0_write (onchip_memory2_s1_agent_m0_write), // .write
  1742. .rp_endofpacket (onchip_memory2_s1_agent_rp_endofpacket), // rp.endofpacket
  1743. .rp_ready (onchip_memory2_s1_agent_rp_ready), // .ready
  1744. .rp_valid (onchip_memory2_s1_agent_rp_valid), // .valid
  1745. .rp_data (onchip_memory2_s1_agent_rp_data), // .data
  1746. .rp_startofpacket (onchip_memory2_s1_agent_rp_startofpacket), // .startofpacket
  1747. .cp_ready (cmd_mux_003_src_ready), // cp.ready
  1748. .cp_valid (cmd_mux_003_src_valid), // .valid
  1749. .cp_data (cmd_mux_003_src_data), // .data
  1750. .cp_startofpacket (cmd_mux_003_src_startofpacket), // .startofpacket
  1751. .cp_endofpacket (cmd_mux_003_src_endofpacket), // .endofpacket
  1752. .cp_channel (cmd_mux_003_src_channel), // .channel
  1753. .rf_sink_ready (onchip_memory2_s1_agent_rsp_fifo_out_ready), // rf_sink.ready
  1754. .rf_sink_valid (onchip_memory2_s1_agent_rsp_fifo_out_valid), // .valid
  1755. .rf_sink_startofpacket (onchip_memory2_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1756. .rf_sink_endofpacket (onchip_memory2_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1757. .rf_sink_data (onchip_memory2_s1_agent_rsp_fifo_out_data), // .data
  1758. .rf_source_ready (onchip_memory2_s1_agent_rf_source_ready), // rf_source.ready
  1759. .rf_source_valid (onchip_memory2_s1_agent_rf_source_valid), // .valid
  1760. .rf_source_startofpacket (onchip_memory2_s1_agent_rf_source_startofpacket), // .startofpacket
  1761. .rf_source_endofpacket (onchip_memory2_s1_agent_rf_source_endofpacket), // .endofpacket
  1762. .rf_source_data (onchip_memory2_s1_agent_rf_source_data), // .data
  1763. .rdata_fifo_sink_ready (avalon_st_adapter_003_out_0_ready), // rdata_fifo_sink.ready
  1764. .rdata_fifo_sink_valid (avalon_st_adapter_003_out_0_valid), // .valid
  1765. .rdata_fifo_sink_data (avalon_st_adapter_003_out_0_data), // .data
  1766. .rdata_fifo_sink_error (avalon_st_adapter_003_out_0_error), // .error
  1767. .rdata_fifo_src_ready (onchip_memory2_s1_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready
  1768. .rdata_fifo_src_valid (onchip_memory2_s1_agent_rdata_fifo_src_valid), // .valid
  1769. .rdata_fifo_src_data (onchip_memory2_s1_agent_rdata_fifo_src_data), // .data
  1770. .m0_response (2'b00), // (terminated)
  1771. .m0_writeresponsevalid (1'b0) // (terminated)
  1772. );
  1773. altera_avalon_sc_fifo #(
  1774. .SYMBOLS_PER_BEAT (1),
  1775. .BITS_PER_SYMBOL (97),
  1776. .FIFO_DEPTH (2),
  1777. .CHANNEL_WIDTH (0),
  1778. .ERROR_WIDTH (0),
  1779. .USE_PACKETS (1),
  1780. .USE_FILL_LEVEL (0),
  1781. .EMPTY_LATENCY (1),
  1782. .USE_MEMORY_BLOCKS (0),
  1783. .USE_STORE_FORWARD (0),
  1784. .USE_ALMOST_FULL_IF (0),
  1785. .USE_ALMOST_EMPTY_IF (0)
  1786. ) onchip_memory2_s1_agent_rsp_fifo (
  1787. .clk (clk_50_clk_clk), // clk.clk
  1788. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1789. .in_data (onchip_memory2_s1_agent_rf_source_data), // in.data
  1790. .in_valid (onchip_memory2_s1_agent_rf_source_valid), // .valid
  1791. .in_ready (onchip_memory2_s1_agent_rf_source_ready), // .ready
  1792. .in_startofpacket (onchip_memory2_s1_agent_rf_source_startofpacket), // .startofpacket
  1793. .in_endofpacket (onchip_memory2_s1_agent_rf_source_endofpacket), // .endofpacket
  1794. .out_data (onchip_memory2_s1_agent_rsp_fifo_out_data), // out.data
  1795. .out_valid (onchip_memory2_s1_agent_rsp_fifo_out_valid), // .valid
  1796. .out_ready (onchip_memory2_s1_agent_rsp_fifo_out_ready), // .ready
  1797. .out_startofpacket (onchip_memory2_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1798. .out_endofpacket (onchip_memory2_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1799. .csr_address (2'b00), // (terminated)
  1800. .csr_read (1'b0), // (terminated)
  1801. .csr_write (1'b0), // (terminated)
  1802. .csr_readdata (), // (terminated)
  1803. .csr_writedata (32'b00000000000000000000000000000000), // (terminated)
  1804. .almost_full_data (), // (terminated)
  1805. .almost_empty_data (), // (terminated)
  1806. .in_empty (1'b0), // (terminated)
  1807. .out_empty (), // (terminated)
  1808. .in_error (1'b0), // (terminated)
  1809. .out_error (), // (terminated)
  1810. .in_channel (1'b0), // (terminated)
  1811. .out_channel () // (terminated)
  1812. );
  1813. altera_merlin_slave_agent #(
  1814. .PKT_ORI_BURST_SIZE_H (95),
  1815. .PKT_ORI_BURST_SIZE_L (93),
  1816. .PKT_RESPONSE_STATUS_H (92),
  1817. .PKT_RESPONSE_STATUS_L (91),
  1818. .PKT_BURST_SIZE_H (70),
  1819. .PKT_BURST_SIZE_L (68),
  1820. .PKT_TRANS_LOCK (60),
  1821. .PKT_BEGIN_BURST (75),
  1822. .PKT_PROTECTION_H (86),
  1823. .PKT_PROTECTION_L (84),
  1824. .PKT_BURSTWRAP_H (67),
  1825. .PKT_BURSTWRAP_L (65),
  1826. .PKT_BYTE_CNT_H (64),
  1827. .PKT_BYTE_CNT_L (62),
  1828. .PKT_ADDR_H (55),
  1829. .PKT_ADDR_L (36),
  1830. .PKT_TRANS_COMPRESSED_READ (56),
  1831. .PKT_TRANS_POSTED (57),
  1832. .PKT_TRANS_WRITE (58),
  1833. .PKT_TRANS_READ (59),
  1834. .PKT_DATA_H (31),
  1835. .PKT_DATA_L (0),
  1836. .PKT_BYTEEN_H (35),
  1837. .PKT_BYTEEN_L (32),
  1838. .PKT_SRC_ID_H (79),
  1839. .PKT_SRC_ID_L (77),
  1840. .PKT_DEST_ID_H (82),
  1841. .PKT_DEST_ID_L (80),
  1842. .PKT_SYMBOL_W (8),
  1843. .ST_CHANNEL_W (7),
  1844. .ST_DATA_W (96),
  1845. .AVS_BURSTCOUNT_W (3),
  1846. .SUPPRESS_0_BYTEEN_CMD (0),
  1847. .PREVENT_FIFO_OVERFLOW (1),
  1848. .USE_READRESPONSE (0),
  1849. .USE_WRITERESPONSE (0),
  1850. .ECC_ENABLE (0)
  1851. ) pio_led_s1_agent (
  1852. .clk (clk_50_clk_clk), // clk.clk
  1853. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1854. .m0_address (pio_led_s1_agent_m0_address), // m0.address
  1855. .m0_burstcount (pio_led_s1_agent_m0_burstcount), // .burstcount
  1856. .m0_byteenable (pio_led_s1_agent_m0_byteenable), // .byteenable
  1857. .m0_debugaccess (pio_led_s1_agent_m0_debugaccess), // .debugaccess
  1858. .m0_lock (pio_led_s1_agent_m0_lock), // .lock
  1859. .m0_readdata (pio_led_s1_agent_m0_readdata), // .readdata
  1860. .m0_readdatavalid (pio_led_s1_agent_m0_readdatavalid), // .readdatavalid
  1861. .m0_read (pio_led_s1_agent_m0_read), // .read
  1862. .m0_waitrequest (pio_led_s1_agent_m0_waitrequest), // .waitrequest
  1863. .m0_writedata (pio_led_s1_agent_m0_writedata), // .writedata
  1864. .m0_write (pio_led_s1_agent_m0_write), // .write
  1865. .rp_endofpacket (pio_led_s1_agent_rp_endofpacket), // rp.endofpacket
  1866. .rp_ready (pio_led_s1_agent_rp_ready), // .ready
  1867. .rp_valid (pio_led_s1_agent_rp_valid), // .valid
  1868. .rp_data (pio_led_s1_agent_rp_data), // .data
  1869. .rp_startofpacket (pio_led_s1_agent_rp_startofpacket), // .startofpacket
  1870. .cp_ready (cmd_mux_004_src_ready), // cp.ready
  1871. .cp_valid (cmd_mux_004_src_valid), // .valid
  1872. .cp_data (cmd_mux_004_src_data), // .data
  1873. .cp_startofpacket (cmd_mux_004_src_startofpacket), // .startofpacket
  1874. .cp_endofpacket (cmd_mux_004_src_endofpacket), // .endofpacket
  1875. .cp_channel (cmd_mux_004_src_channel), // .channel
  1876. .rf_sink_ready (pio_led_s1_agent_rsp_fifo_out_ready), // rf_sink.ready
  1877. .rf_sink_valid (pio_led_s1_agent_rsp_fifo_out_valid), // .valid
  1878. .rf_sink_startofpacket (pio_led_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1879. .rf_sink_endofpacket (pio_led_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1880. .rf_sink_data (pio_led_s1_agent_rsp_fifo_out_data), // .data
  1881. .rf_source_ready (pio_led_s1_agent_rf_source_ready), // rf_source.ready
  1882. .rf_source_valid (pio_led_s1_agent_rf_source_valid), // .valid
  1883. .rf_source_startofpacket (pio_led_s1_agent_rf_source_startofpacket), // .startofpacket
  1884. .rf_source_endofpacket (pio_led_s1_agent_rf_source_endofpacket), // .endofpacket
  1885. .rf_source_data (pio_led_s1_agent_rf_source_data), // .data
  1886. .rdata_fifo_sink_ready (avalon_st_adapter_004_out_0_ready), // rdata_fifo_sink.ready
  1887. .rdata_fifo_sink_valid (avalon_st_adapter_004_out_0_valid), // .valid
  1888. .rdata_fifo_sink_data (avalon_st_adapter_004_out_0_data), // .data
  1889. .rdata_fifo_sink_error (avalon_st_adapter_004_out_0_error), // .error
  1890. .rdata_fifo_src_ready (pio_led_s1_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready
  1891. .rdata_fifo_src_valid (pio_led_s1_agent_rdata_fifo_src_valid), // .valid
  1892. .rdata_fifo_src_data (pio_led_s1_agent_rdata_fifo_src_data), // .data
  1893. .m0_response (2'b00), // (terminated)
  1894. .m0_writeresponsevalid (1'b0) // (terminated)
  1895. );
  1896. altera_avalon_sc_fifo #(
  1897. .SYMBOLS_PER_BEAT (1),
  1898. .BITS_PER_SYMBOL (97),
  1899. .FIFO_DEPTH (2),
  1900. .CHANNEL_WIDTH (0),
  1901. .ERROR_WIDTH (0),
  1902. .USE_PACKETS (1),
  1903. .USE_FILL_LEVEL (0),
  1904. .EMPTY_LATENCY (1),
  1905. .USE_MEMORY_BLOCKS (0),
  1906. .USE_STORE_FORWARD (0),
  1907. .USE_ALMOST_FULL_IF (0),
  1908. .USE_ALMOST_EMPTY_IF (0)
  1909. ) pio_led_s1_agent_rsp_fifo (
  1910. .clk (clk_50_clk_clk), // clk.clk
  1911. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1912. .in_data (pio_led_s1_agent_rf_source_data), // in.data
  1913. .in_valid (pio_led_s1_agent_rf_source_valid), // .valid
  1914. .in_ready (pio_led_s1_agent_rf_source_ready), // .ready
  1915. .in_startofpacket (pio_led_s1_agent_rf_source_startofpacket), // .startofpacket
  1916. .in_endofpacket (pio_led_s1_agent_rf_source_endofpacket), // .endofpacket
  1917. .out_data (pio_led_s1_agent_rsp_fifo_out_data), // out.data
  1918. .out_valid (pio_led_s1_agent_rsp_fifo_out_valid), // .valid
  1919. .out_ready (pio_led_s1_agent_rsp_fifo_out_ready), // .ready
  1920. .out_startofpacket (pio_led_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1921. .out_endofpacket (pio_led_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1922. .csr_address (2'b00), // (terminated)
  1923. .csr_read (1'b0), // (terminated)
  1924. .csr_write (1'b0), // (terminated)
  1925. .csr_readdata (), // (terminated)
  1926. .csr_writedata (32'b00000000000000000000000000000000), // (terminated)
  1927. .almost_full_data (), // (terminated)
  1928. .almost_empty_data (), // (terminated)
  1929. .in_empty (1'b0), // (terminated)
  1930. .out_empty (), // (terminated)
  1931. .in_error (1'b0), // (terminated)
  1932. .out_error (), // (terminated)
  1933. .in_channel (1'b0), // (terminated)
  1934. .out_channel () // (terminated)
  1935. );
  1936. altera_merlin_slave_agent #(
  1937. .PKT_ORI_BURST_SIZE_H (95),
  1938. .PKT_ORI_BURST_SIZE_L (93),
  1939. .PKT_RESPONSE_STATUS_H (92),
  1940. .PKT_RESPONSE_STATUS_L (91),
  1941. .PKT_BURST_SIZE_H (70),
  1942. .PKT_BURST_SIZE_L (68),
  1943. .PKT_TRANS_LOCK (60),
  1944. .PKT_BEGIN_BURST (75),
  1945. .PKT_PROTECTION_H (86),
  1946. .PKT_PROTECTION_L (84),
  1947. .PKT_BURSTWRAP_H (67),
  1948. .PKT_BURSTWRAP_L (65),
  1949. .PKT_BYTE_CNT_H (64),
  1950. .PKT_BYTE_CNT_L (62),
  1951. .PKT_ADDR_H (55),
  1952. .PKT_ADDR_L (36),
  1953. .PKT_TRANS_COMPRESSED_READ (56),
  1954. .PKT_TRANS_POSTED (57),
  1955. .PKT_TRANS_WRITE (58),
  1956. .PKT_TRANS_READ (59),
  1957. .PKT_DATA_H (31),
  1958. .PKT_DATA_L (0),
  1959. .PKT_BYTEEN_H (35),
  1960. .PKT_BYTEEN_L (32),
  1961. .PKT_SRC_ID_H (79),
  1962. .PKT_SRC_ID_L (77),
  1963. .PKT_DEST_ID_H (82),
  1964. .PKT_DEST_ID_L (80),
  1965. .PKT_SYMBOL_W (8),
  1966. .ST_CHANNEL_W (7),
  1967. .ST_DATA_W (96),
  1968. .AVS_BURSTCOUNT_W (3),
  1969. .SUPPRESS_0_BYTEEN_CMD (0),
  1970. .PREVENT_FIFO_OVERFLOW (1),
  1971. .USE_READRESPONSE (0),
  1972. .USE_WRITERESPONSE (0),
  1973. .ECC_ENABLE (0)
  1974. ) pio_matrix_s1_agent (
  1975. .clk (clk_50_clk_clk), // clk.clk
  1976. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1977. .m0_address (pio_matrix_s1_agent_m0_address), // m0.address
  1978. .m0_burstcount (pio_matrix_s1_agent_m0_burstcount), // .burstcount
  1979. .m0_byteenable (pio_matrix_s1_agent_m0_byteenable), // .byteenable
  1980. .m0_debugaccess (pio_matrix_s1_agent_m0_debugaccess), // .debugaccess
  1981. .m0_lock (pio_matrix_s1_agent_m0_lock), // .lock
  1982. .m0_readdata (pio_matrix_s1_agent_m0_readdata), // .readdata
  1983. .m0_readdatavalid (pio_matrix_s1_agent_m0_readdatavalid), // .readdatavalid
  1984. .m0_read (pio_matrix_s1_agent_m0_read), // .read
  1985. .m0_waitrequest (pio_matrix_s1_agent_m0_waitrequest), // .waitrequest
  1986. .m0_writedata (pio_matrix_s1_agent_m0_writedata), // .writedata
  1987. .m0_write (pio_matrix_s1_agent_m0_write), // .write
  1988. .rp_endofpacket (pio_matrix_s1_agent_rp_endofpacket), // rp.endofpacket
  1989. .rp_ready (pio_matrix_s1_agent_rp_ready), // .ready
  1990. .rp_valid (pio_matrix_s1_agent_rp_valid), // .valid
  1991. .rp_data (pio_matrix_s1_agent_rp_data), // .data
  1992. .rp_startofpacket (pio_matrix_s1_agent_rp_startofpacket), // .startofpacket
  1993. .cp_ready (cmd_mux_005_src_ready), // cp.ready
  1994. .cp_valid (cmd_mux_005_src_valid), // .valid
  1995. .cp_data (cmd_mux_005_src_data), // .data
  1996. .cp_startofpacket (cmd_mux_005_src_startofpacket), // .startofpacket
  1997. .cp_endofpacket (cmd_mux_005_src_endofpacket), // .endofpacket
  1998. .cp_channel (cmd_mux_005_src_channel), // .channel
  1999. .rf_sink_ready (pio_matrix_s1_agent_rsp_fifo_out_ready), // rf_sink.ready
  2000. .rf_sink_valid (pio_matrix_s1_agent_rsp_fifo_out_valid), // .valid
  2001. .rf_sink_startofpacket (pio_matrix_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  2002. .rf_sink_endofpacket (pio_matrix_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  2003. .rf_sink_data (pio_matrix_s1_agent_rsp_fifo_out_data), // .data
  2004. .rf_source_ready (pio_matrix_s1_agent_rf_source_ready), // rf_source.ready
  2005. .rf_source_valid (pio_matrix_s1_agent_rf_source_valid), // .valid
  2006. .rf_source_startofpacket (pio_matrix_s1_agent_rf_source_startofpacket), // .startofpacket
  2007. .rf_source_endofpacket (pio_matrix_s1_agent_rf_source_endofpacket), // .endofpacket
  2008. .rf_source_data (pio_matrix_s1_agent_rf_source_data), // .data
  2009. .rdata_fifo_sink_ready (avalon_st_adapter_005_out_0_ready), // rdata_fifo_sink.ready
  2010. .rdata_fifo_sink_valid (avalon_st_adapter_005_out_0_valid), // .valid
  2011. .rdata_fifo_sink_data (avalon_st_adapter_005_out_0_data), // .data
  2012. .rdata_fifo_sink_error (avalon_st_adapter_005_out_0_error), // .error
  2013. .rdata_fifo_src_ready (pio_matrix_s1_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready
  2014. .rdata_fifo_src_valid (pio_matrix_s1_agent_rdata_fifo_src_valid), // .valid
  2015. .rdata_fifo_src_data (pio_matrix_s1_agent_rdata_fifo_src_data), // .data
  2016. .m0_response (2'b00), // (terminated)
  2017. .m0_writeresponsevalid (1'b0) // (terminated)
  2018. );
  2019. altera_avalon_sc_fifo #(
  2020. .SYMBOLS_PER_BEAT (1),
  2021. .BITS_PER_SYMBOL (97),
  2022. .FIFO_DEPTH (2),
  2023. .CHANNEL_WIDTH (0),
  2024. .ERROR_WIDTH (0),
  2025. .USE_PACKETS (1),
  2026. .USE_FILL_LEVEL (0),
  2027. .EMPTY_LATENCY (1),
  2028. .USE_MEMORY_BLOCKS (0),
  2029. .USE_STORE_FORWARD (0),
  2030. .USE_ALMOST_FULL_IF (0),
  2031. .USE_ALMOST_EMPTY_IF (0)
  2032. ) pio_matrix_s1_agent_rsp_fifo (
  2033. .clk (clk_50_clk_clk), // clk.clk
  2034. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2035. .in_data (pio_matrix_s1_agent_rf_source_data), // in.data
  2036. .in_valid (pio_matrix_s1_agent_rf_source_valid), // .valid
  2037. .in_ready (pio_matrix_s1_agent_rf_source_ready), // .ready
  2038. .in_startofpacket (pio_matrix_s1_agent_rf_source_startofpacket), // .startofpacket
  2039. .in_endofpacket (pio_matrix_s1_agent_rf_source_endofpacket), // .endofpacket
  2040. .out_data (pio_matrix_s1_agent_rsp_fifo_out_data), // out.data
  2041. .out_valid (pio_matrix_s1_agent_rsp_fifo_out_valid), // .valid
  2042. .out_ready (pio_matrix_s1_agent_rsp_fifo_out_ready), // .ready
  2043. .out_startofpacket (pio_matrix_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  2044. .out_endofpacket (pio_matrix_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  2045. .csr_address (2'b00), // (terminated)
  2046. .csr_read (1'b0), // (terminated)
  2047. .csr_write (1'b0), // (terminated)
  2048. .csr_readdata (), // (terminated)
  2049. .csr_writedata (32'b00000000000000000000000000000000), // (terminated)
  2050. .almost_full_data (), // (terminated)
  2051. .almost_empty_data (), // (terminated)
  2052. .in_empty (1'b0), // (terminated)
  2053. .out_empty (), // (terminated)
  2054. .in_error (1'b0), // (terminated)
  2055. .out_error (), // (terminated)
  2056. .in_channel (1'b0), // (terminated)
  2057. .out_channel () // (terminated)
  2058. );
  2059. altera_merlin_slave_agent #(
  2060. .PKT_ORI_BURST_SIZE_H (95),
  2061. .PKT_ORI_BURST_SIZE_L (93),
  2062. .PKT_RESPONSE_STATUS_H (92),
  2063. .PKT_RESPONSE_STATUS_L (91),
  2064. .PKT_BURST_SIZE_H (70),
  2065. .PKT_BURST_SIZE_L (68),
  2066. .PKT_TRANS_LOCK (60),
  2067. .PKT_BEGIN_BURST (75),
  2068. .PKT_PROTECTION_H (86),
  2069. .PKT_PROTECTION_L (84),
  2070. .PKT_BURSTWRAP_H (67),
  2071. .PKT_BURSTWRAP_L (65),
  2072. .PKT_BYTE_CNT_H (64),
  2073. .PKT_BYTE_CNT_L (62),
  2074. .PKT_ADDR_H (55),
  2075. .PKT_ADDR_L (36),
  2076. .PKT_TRANS_COMPRESSED_READ (56),
  2077. .PKT_TRANS_POSTED (57),
  2078. .PKT_TRANS_WRITE (58),
  2079. .PKT_TRANS_READ (59),
  2080. .PKT_DATA_H (31),
  2081. .PKT_DATA_L (0),
  2082. .PKT_BYTEEN_H (35),
  2083. .PKT_BYTEEN_L (32),
  2084. .PKT_SRC_ID_H (79),
  2085. .PKT_SRC_ID_L (77),
  2086. .PKT_DEST_ID_H (82),
  2087. .PKT_DEST_ID_L (80),
  2088. .PKT_SYMBOL_W (8),
  2089. .ST_CHANNEL_W (7),
  2090. .ST_DATA_W (96),
  2091. .AVS_BURSTCOUNT_W (3),
  2092. .SUPPRESS_0_BYTEEN_CMD (0),
  2093. .PREVENT_FIFO_OVERFLOW (1),
  2094. .USE_READRESPONSE (0),
  2095. .USE_WRITERESPONSE (0),
  2096. .ECC_ENABLE (0)
  2097. ) pio_button_s1_agent (
  2098. .clk (clk_50_clk_clk), // clk.clk
  2099. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2100. .m0_address (pio_button_s1_agent_m0_address), // m0.address
  2101. .m0_burstcount (pio_button_s1_agent_m0_burstcount), // .burstcount
  2102. .m0_byteenable (pio_button_s1_agent_m0_byteenable), // .byteenable
  2103. .m0_debugaccess (pio_button_s1_agent_m0_debugaccess), // .debugaccess
  2104. .m0_lock (pio_button_s1_agent_m0_lock), // .lock
  2105. .m0_readdata (pio_button_s1_agent_m0_readdata), // .readdata
  2106. .m0_readdatavalid (pio_button_s1_agent_m0_readdatavalid), // .readdatavalid
  2107. .m0_read (pio_button_s1_agent_m0_read), // .read
  2108. .m0_waitrequest (pio_button_s1_agent_m0_waitrequest), // .waitrequest
  2109. .m0_writedata (pio_button_s1_agent_m0_writedata), // .writedata
  2110. .m0_write (pio_button_s1_agent_m0_write), // .write
  2111. .rp_endofpacket (pio_button_s1_agent_rp_endofpacket), // rp.endofpacket
  2112. .rp_ready (pio_button_s1_agent_rp_ready), // .ready
  2113. .rp_valid (pio_button_s1_agent_rp_valid), // .valid
  2114. .rp_data (pio_button_s1_agent_rp_data), // .data
  2115. .rp_startofpacket (pio_button_s1_agent_rp_startofpacket), // .startofpacket
  2116. .cp_ready (cmd_mux_006_src_ready), // cp.ready
  2117. .cp_valid (cmd_mux_006_src_valid), // .valid
  2118. .cp_data (cmd_mux_006_src_data), // .data
  2119. .cp_startofpacket (cmd_mux_006_src_startofpacket), // .startofpacket
  2120. .cp_endofpacket (cmd_mux_006_src_endofpacket), // .endofpacket
  2121. .cp_channel (cmd_mux_006_src_channel), // .channel
  2122. .rf_sink_ready (pio_button_s1_agent_rsp_fifo_out_ready), // rf_sink.ready
  2123. .rf_sink_valid (pio_button_s1_agent_rsp_fifo_out_valid), // .valid
  2124. .rf_sink_startofpacket (pio_button_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  2125. .rf_sink_endofpacket (pio_button_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  2126. .rf_sink_data (pio_button_s1_agent_rsp_fifo_out_data), // .data
  2127. .rf_source_ready (pio_button_s1_agent_rf_source_ready), // rf_source.ready
  2128. .rf_source_valid (pio_button_s1_agent_rf_source_valid), // .valid
  2129. .rf_source_startofpacket (pio_button_s1_agent_rf_source_startofpacket), // .startofpacket
  2130. .rf_source_endofpacket (pio_button_s1_agent_rf_source_endofpacket), // .endofpacket
  2131. .rf_source_data (pio_button_s1_agent_rf_source_data), // .data
  2132. .rdata_fifo_sink_ready (avalon_st_adapter_006_out_0_ready), // rdata_fifo_sink.ready
  2133. .rdata_fifo_sink_valid (avalon_st_adapter_006_out_0_valid), // .valid
  2134. .rdata_fifo_sink_data (avalon_st_adapter_006_out_0_data), // .data
  2135. .rdata_fifo_sink_error (avalon_st_adapter_006_out_0_error), // .error
  2136. .rdata_fifo_src_ready (pio_button_s1_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready
  2137. .rdata_fifo_src_valid (pio_button_s1_agent_rdata_fifo_src_valid), // .valid
  2138. .rdata_fifo_src_data (pio_button_s1_agent_rdata_fifo_src_data), // .data
  2139. .m0_response (2'b00), // (terminated)
  2140. .m0_writeresponsevalid (1'b0) // (terminated)
  2141. );
  2142. altera_avalon_sc_fifo #(
  2143. .SYMBOLS_PER_BEAT (1),
  2144. .BITS_PER_SYMBOL (97),
  2145. .FIFO_DEPTH (2),
  2146. .CHANNEL_WIDTH (0),
  2147. .ERROR_WIDTH (0),
  2148. .USE_PACKETS (1),
  2149. .USE_FILL_LEVEL (0),
  2150. .EMPTY_LATENCY (1),
  2151. .USE_MEMORY_BLOCKS (0),
  2152. .USE_STORE_FORWARD (0),
  2153. .USE_ALMOST_FULL_IF (0),
  2154. .USE_ALMOST_EMPTY_IF (0)
  2155. ) pio_button_s1_agent_rsp_fifo (
  2156. .clk (clk_50_clk_clk), // clk.clk
  2157. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2158. .in_data (pio_button_s1_agent_rf_source_data), // in.data
  2159. .in_valid (pio_button_s1_agent_rf_source_valid), // .valid
  2160. .in_ready (pio_button_s1_agent_rf_source_ready), // .ready
  2161. .in_startofpacket (pio_button_s1_agent_rf_source_startofpacket), // .startofpacket
  2162. .in_endofpacket (pio_button_s1_agent_rf_source_endofpacket), // .endofpacket
  2163. .out_data (pio_button_s1_agent_rsp_fifo_out_data), // out.data
  2164. .out_valid (pio_button_s1_agent_rsp_fifo_out_valid), // .valid
  2165. .out_ready (pio_button_s1_agent_rsp_fifo_out_ready), // .ready
  2166. .out_startofpacket (pio_button_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  2167. .out_endofpacket (pio_button_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  2168. .csr_address (2'b00), // (terminated)
  2169. .csr_read (1'b0), // (terminated)
  2170. .csr_write (1'b0), // (terminated)
  2171. .csr_readdata (), // (terminated)
  2172. .csr_writedata (32'b00000000000000000000000000000000), // (terminated)
  2173. .almost_full_data (), // (terminated)
  2174. .almost_empty_data (), // (terminated)
  2175. .in_empty (1'b0), // (terminated)
  2176. .out_empty (), // (terminated)
  2177. .in_error (1'b0), // (terminated)
  2178. .out_error (), // (terminated)
  2179. .in_channel (1'b0), // (terminated)
  2180. .out_channel () // (terminated)
  2181. );
  2182. nios2_uc_mm_interconnect_0_router router (
  2183. .sink_ready (nios2_data_master_agent_cp_ready), // sink.ready
  2184. .sink_valid (nios2_data_master_agent_cp_valid), // .valid
  2185. .sink_data (nios2_data_master_agent_cp_data), // .data
  2186. .sink_startofpacket (nios2_data_master_agent_cp_startofpacket), // .startofpacket
  2187. .sink_endofpacket (nios2_data_master_agent_cp_endofpacket), // .endofpacket
  2188. .clk (clk_50_clk_clk), // clk.clk
  2189. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2190. .src_ready (router_src_ready), // src.ready
  2191. .src_valid (router_src_valid), // .valid
  2192. .src_data (router_src_data), // .data
  2193. .src_channel (router_src_channel), // .channel
  2194. .src_startofpacket (router_src_startofpacket), // .startofpacket
  2195. .src_endofpacket (router_src_endofpacket) // .endofpacket
  2196. );
  2197. nios2_uc_mm_interconnect_0_router router_001 (
  2198. .sink_ready (nios2_instruction_master_agent_cp_ready), // sink.ready
  2199. .sink_valid (nios2_instruction_master_agent_cp_valid), // .valid
  2200. .sink_data (nios2_instruction_master_agent_cp_data), // .data
  2201. .sink_startofpacket (nios2_instruction_master_agent_cp_startofpacket), // .startofpacket
  2202. .sink_endofpacket (nios2_instruction_master_agent_cp_endofpacket), // .endofpacket
  2203. .clk (clk_50_clk_clk), // clk.clk
  2204. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2205. .src_ready (router_001_src_ready), // src.ready
  2206. .src_valid (router_001_src_valid), // .valid
  2207. .src_data (router_001_src_data), // .data
  2208. .src_channel (router_001_src_channel), // .channel
  2209. .src_startofpacket (router_001_src_startofpacket), // .startofpacket
  2210. .src_endofpacket (router_001_src_endofpacket) // .endofpacket
  2211. );
  2212. nios2_uc_mm_interconnect_0_router_002 router_002 (
  2213. .sink_ready (jtag_uart_avalon_jtag_slave_agent_rp_ready), // sink.ready
  2214. .sink_valid (jtag_uart_avalon_jtag_slave_agent_rp_valid), // .valid
  2215. .sink_data (jtag_uart_avalon_jtag_slave_agent_rp_data), // .data
  2216. .sink_startofpacket (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket), // .startofpacket
  2217. .sink_endofpacket (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket), // .endofpacket
  2218. .clk (clk_50_clk_clk), // clk.clk
  2219. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2220. .src_ready (router_002_src_ready), // src.ready
  2221. .src_valid (router_002_src_valid), // .valid
  2222. .src_data (router_002_src_data), // .data
  2223. .src_channel (router_002_src_channel), // .channel
  2224. .src_startofpacket (router_002_src_startofpacket), // .startofpacket
  2225. .src_endofpacket (router_002_src_endofpacket) // .endofpacket
  2226. );
  2227. nios2_uc_mm_interconnect_0_router_002 router_003 (
  2228. .sink_ready (lcd_16207_control_slave_agent_rp_ready), // sink.ready
  2229. .sink_valid (lcd_16207_control_slave_agent_rp_valid), // .valid
  2230. .sink_data (lcd_16207_control_slave_agent_rp_data), // .data
  2231. .sink_startofpacket (lcd_16207_control_slave_agent_rp_startofpacket), // .startofpacket
  2232. .sink_endofpacket (lcd_16207_control_slave_agent_rp_endofpacket), // .endofpacket
  2233. .clk (clk_50_clk_clk), // clk.clk
  2234. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2235. .src_ready (router_003_src_ready), // src.ready
  2236. .src_valid (router_003_src_valid), // .valid
  2237. .src_data (router_003_src_data), // .data
  2238. .src_channel (router_003_src_channel), // .channel
  2239. .src_startofpacket (router_003_src_startofpacket), // .startofpacket
  2240. .src_endofpacket (router_003_src_endofpacket) // .endofpacket
  2241. );
  2242. nios2_uc_mm_interconnect_0_router_002 router_004 (
  2243. .sink_ready (nios2_debug_mem_slave_agent_rp_ready), // sink.ready
  2244. .sink_valid (nios2_debug_mem_slave_agent_rp_valid), // .valid
  2245. .sink_data (nios2_debug_mem_slave_agent_rp_data), // .data
  2246. .sink_startofpacket (nios2_debug_mem_slave_agent_rp_startofpacket), // .startofpacket
  2247. .sink_endofpacket (nios2_debug_mem_slave_agent_rp_endofpacket), // .endofpacket
  2248. .clk (clk_50_clk_clk), // clk.clk
  2249. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2250. .src_ready (router_004_src_ready), // src.ready
  2251. .src_valid (router_004_src_valid), // .valid
  2252. .src_data (router_004_src_data), // .data
  2253. .src_channel (router_004_src_channel), // .channel
  2254. .src_startofpacket (router_004_src_startofpacket), // .startofpacket
  2255. .src_endofpacket (router_004_src_endofpacket) // .endofpacket
  2256. );
  2257. nios2_uc_mm_interconnect_0_router_002 router_005 (
  2258. .sink_ready (onchip_memory2_s1_agent_rp_ready), // sink.ready
  2259. .sink_valid (onchip_memory2_s1_agent_rp_valid), // .valid
  2260. .sink_data (onchip_memory2_s1_agent_rp_data), // .data
  2261. .sink_startofpacket (onchip_memory2_s1_agent_rp_startofpacket), // .startofpacket
  2262. .sink_endofpacket (onchip_memory2_s1_agent_rp_endofpacket), // .endofpacket
  2263. .clk (clk_50_clk_clk), // clk.clk
  2264. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2265. .src_ready (router_005_src_ready), // src.ready
  2266. .src_valid (router_005_src_valid), // .valid
  2267. .src_data (router_005_src_data), // .data
  2268. .src_channel (router_005_src_channel), // .channel
  2269. .src_startofpacket (router_005_src_startofpacket), // .startofpacket
  2270. .src_endofpacket (router_005_src_endofpacket) // .endofpacket
  2271. );
  2272. nios2_uc_mm_interconnect_0_router_002 router_006 (
  2273. .sink_ready (pio_led_s1_agent_rp_ready), // sink.ready
  2274. .sink_valid (pio_led_s1_agent_rp_valid), // .valid
  2275. .sink_data (pio_led_s1_agent_rp_data), // .data
  2276. .sink_startofpacket (pio_led_s1_agent_rp_startofpacket), // .startofpacket
  2277. .sink_endofpacket (pio_led_s1_agent_rp_endofpacket), // .endofpacket
  2278. .clk (clk_50_clk_clk), // clk.clk
  2279. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2280. .src_ready (router_006_src_ready), // src.ready
  2281. .src_valid (router_006_src_valid), // .valid
  2282. .src_data (router_006_src_data), // .data
  2283. .src_channel (router_006_src_channel), // .channel
  2284. .src_startofpacket (router_006_src_startofpacket), // .startofpacket
  2285. .src_endofpacket (router_006_src_endofpacket) // .endofpacket
  2286. );
  2287. nios2_uc_mm_interconnect_0_router_002 router_007 (
  2288. .sink_ready (pio_matrix_s1_agent_rp_ready), // sink.ready
  2289. .sink_valid (pio_matrix_s1_agent_rp_valid), // .valid
  2290. .sink_data (pio_matrix_s1_agent_rp_data), // .data
  2291. .sink_startofpacket (pio_matrix_s1_agent_rp_startofpacket), // .startofpacket
  2292. .sink_endofpacket (pio_matrix_s1_agent_rp_endofpacket), // .endofpacket
  2293. .clk (clk_50_clk_clk), // clk.clk
  2294. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2295. .src_ready (router_007_src_ready), // src.ready
  2296. .src_valid (router_007_src_valid), // .valid
  2297. .src_data (router_007_src_data), // .data
  2298. .src_channel (router_007_src_channel), // .channel
  2299. .src_startofpacket (router_007_src_startofpacket), // .startofpacket
  2300. .src_endofpacket (router_007_src_endofpacket) // .endofpacket
  2301. );
  2302. nios2_uc_mm_interconnect_0_router_002 router_008 (
  2303. .sink_ready (pio_button_s1_agent_rp_ready), // sink.ready
  2304. .sink_valid (pio_button_s1_agent_rp_valid), // .valid
  2305. .sink_data (pio_button_s1_agent_rp_data), // .data
  2306. .sink_startofpacket (pio_button_s1_agent_rp_startofpacket), // .startofpacket
  2307. .sink_endofpacket (pio_button_s1_agent_rp_endofpacket), // .endofpacket
  2308. .clk (clk_50_clk_clk), // clk.clk
  2309. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2310. .src_ready (router_008_src_ready), // src.ready
  2311. .src_valid (router_008_src_valid), // .valid
  2312. .src_data (router_008_src_data), // .data
  2313. .src_channel (router_008_src_channel), // .channel
  2314. .src_startofpacket (router_008_src_startofpacket), // .startofpacket
  2315. .src_endofpacket (router_008_src_endofpacket) // .endofpacket
  2316. );
  2317. nios2_uc_mm_interconnect_0_cmd_demux cmd_demux (
  2318. .clk (clk_50_clk_clk), // clk.clk
  2319. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2320. .sink_ready (router_src_ready), // sink.ready
  2321. .sink_channel (router_src_channel), // .channel
  2322. .sink_data (router_src_data), // .data
  2323. .sink_startofpacket (router_src_startofpacket), // .startofpacket
  2324. .sink_endofpacket (router_src_endofpacket), // .endofpacket
  2325. .sink_valid (router_src_valid), // .valid
  2326. .src0_ready (cmd_demux_src0_ready), // src0.ready
  2327. .src0_valid (cmd_demux_src0_valid), // .valid
  2328. .src0_data (cmd_demux_src0_data), // .data
  2329. .src0_channel (cmd_demux_src0_channel), // .channel
  2330. .src0_startofpacket (cmd_demux_src0_startofpacket), // .startofpacket
  2331. .src0_endofpacket (cmd_demux_src0_endofpacket), // .endofpacket
  2332. .src1_ready (cmd_demux_src1_ready), // src1.ready
  2333. .src1_valid (cmd_demux_src1_valid), // .valid
  2334. .src1_data (cmd_demux_src1_data), // .data
  2335. .src1_channel (cmd_demux_src1_channel), // .channel
  2336. .src1_startofpacket (cmd_demux_src1_startofpacket), // .startofpacket
  2337. .src1_endofpacket (cmd_demux_src1_endofpacket), // .endofpacket
  2338. .src2_ready (cmd_demux_src2_ready), // src2.ready
  2339. .src2_valid (cmd_demux_src2_valid), // .valid
  2340. .src2_data (cmd_demux_src2_data), // .data
  2341. .src2_channel (cmd_demux_src2_channel), // .channel
  2342. .src2_startofpacket (cmd_demux_src2_startofpacket), // .startofpacket
  2343. .src2_endofpacket (cmd_demux_src2_endofpacket), // .endofpacket
  2344. .src3_ready (cmd_demux_src3_ready), // src3.ready
  2345. .src3_valid (cmd_demux_src3_valid), // .valid
  2346. .src3_data (cmd_demux_src3_data), // .data
  2347. .src3_channel (cmd_demux_src3_channel), // .channel
  2348. .src3_startofpacket (cmd_demux_src3_startofpacket), // .startofpacket
  2349. .src3_endofpacket (cmd_demux_src3_endofpacket), // .endofpacket
  2350. .src4_ready (cmd_demux_src4_ready), // src4.ready
  2351. .src4_valid (cmd_demux_src4_valid), // .valid
  2352. .src4_data (cmd_demux_src4_data), // .data
  2353. .src4_channel (cmd_demux_src4_channel), // .channel
  2354. .src4_startofpacket (cmd_demux_src4_startofpacket), // .startofpacket
  2355. .src4_endofpacket (cmd_demux_src4_endofpacket), // .endofpacket
  2356. .src5_ready (cmd_demux_src5_ready), // src5.ready
  2357. .src5_valid (cmd_demux_src5_valid), // .valid
  2358. .src5_data (cmd_demux_src5_data), // .data
  2359. .src5_channel (cmd_demux_src5_channel), // .channel
  2360. .src5_startofpacket (cmd_demux_src5_startofpacket), // .startofpacket
  2361. .src5_endofpacket (cmd_demux_src5_endofpacket), // .endofpacket
  2362. .src6_ready (cmd_demux_src6_ready), // src6.ready
  2363. .src6_valid (cmd_demux_src6_valid), // .valid
  2364. .src6_data (cmd_demux_src6_data), // .data
  2365. .src6_channel (cmd_demux_src6_channel), // .channel
  2366. .src6_startofpacket (cmd_demux_src6_startofpacket), // .startofpacket
  2367. .src6_endofpacket (cmd_demux_src6_endofpacket) // .endofpacket
  2368. );
  2369. nios2_uc_mm_interconnect_0_cmd_demux cmd_demux_001 (
  2370. .clk (clk_50_clk_clk), // clk.clk
  2371. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2372. .sink_ready (router_001_src_ready), // sink.ready
  2373. .sink_channel (router_001_src_channel), // .channel
  2374. .sink_data (router_001_src_data), // .data
  2375. .sink_startofpacket (router_001_src_startofpacket), // .startofpacket
  2376. .sink_endofpacket (router_001_src_endofpacket), // .endofpacket
  2377. .sink_valid (router_001_src_valid), // .valid
  2378. .src0_ready (cmd_demux_001_src0_ready), // src0.ready
  2379. .src0_valid (cmd_demux_001_src0_valid), // .valid
  2380. .src0_data (cmd_demux_001_src0_data), // .data
  2381. .src0_channel (cmd_demux_001_src0_channel), // .channel
  2382. .src0_startofpacket (cmd_demux_001_src0_startofpacket), // .startofpacket
  2383. .src0_endofpacket (cmd_demux_001_src0_endofpacket), // .endofpacket
  2384. .src1_ready (cmd_demux_001_src1_ready), // src1.ready
  2385. .src1_valid (cmd_demux_001_src1_valid), // .valid
  2386. .src1_data (cmd_demux_001_src1_data), // .data
  2387. .src1_channel (cmd_demux_001_src1_channel), // .channel
  2388. .src1_startofpacket (cmd_demux_001_src1_startofpacket), // .startofpacket
  2389. .src1_endofpacket (cmd_demux_001_src1_endofpacket), // .endofpacket
  2390. .src2_ready (cmd_demux_001_src2_ready), // src2.ready
  2391. .src2_valid (cmd_demux_001_src2_valid), // .valid
  2392. .src2_data (cmd_demux_001_src2_data), // .data
  2393. .src2_channel (cmd_demux_001_src2_channel), // .channel
  2394. .src2_startofpacket (cmd_demux_001_src2_startofpacket), // .startofpacket
  2395. .src2_endofpacket (cmd_demux_001_src2_endofpacket), // .endofpacket
  2396. .src3_ready (cmd_demux_001_src3_ready), // src3.ready
  2397. .src3_valid (cmd_demux_001_src3_valid), // .valid
  2398. .src3_data (cmd_demux_001_src3_data), // .data
  2399. .src3_channel (cmd_demux_001_src3_channel), // .channel
  2400. .src3_startofpacket (cmd_demux_001_src3_startofpacket), // .startofpacket
  2401. .src3_endofpacket (cmd_demux_001_src3_endofpacket), // .endofpacket
  2402. .src4_ready (cmd_demux_001_src4_ready), // src4.ready
  2403. .src4_valid (cmd_demux_001_src4_valid), // .valid
  2404. .src4_data (cmd_demux_001_src4_data), // .data
  2405. .src4_channel (cmd_demux_001_src4_channel), // .channel
  2406. .src4_startofpacket (cmd_demux_001_src4_startofpacket), // .startofpacket
  2407. .src4_endofpacket (cmd_demux_001_src4_endofpacket), // .endofpacket
  2408. .src5_ready (cmd_demux_001_src5_ready), // src5.ready
  2409. .src5_valid (cmd_demux_001_src5_valid), // .valid
  2410. .src5_data (cmd_demux_001_src5_data), // .data
  2411. .src5_channel (cmd_demux_001_src5_channel), // .channel
  2412. .src5_startofpacket (cmd_demux_001_src5_startofpacket), // .startofpacket
  2413. .src5_endofpacket (cmd_demux_001_src5_endofpacket), // .endofpacket
  2414. .src6_ready (cmd_demux_001_src6_ready), // src6.ready
  2415. .src6_valid (cmd_demux_001_src6_valid), // .valid
  2416. .src6_data (cmd_demux_001_src6_data), // .data
  2417. .src6_channel (cmd_demux_001_src6_channel), // .channel
  2418. .src6_startofpacket (cmd_demux_001_src6_startofpacket), // .startofpacket
  2419. .src6_endofpacket (cmd_demux_001_src6_endofpacket) // .endofpacket
  2420. );
  2421. nios2_uc_mm_interconnect_0_cmd_mux cmd_mux (
  2422. .clk (clk_50_clk_clk), // clk.clk
  2423. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2424. .src_ready (cmd_mux_src_ready), // src.ready
  2425. .src_valid (cmd_mux_src_valid), // .valid
  2426. .src_data (cmd_mux_src_data), // .data
  2427. .src_channel (cmd_mux_src_channel), // .channel
  2428. .src_startofpacket (cmd_mux_src_startofpacket), // .startofpacket
  2429. .src_endofpacket (cmd_mux_src_endofpacket), // .endofpacket
  2430. .sink0_ready (cmd_demux_src0_ready), // sink0.ready
  2431. .sink0_valid (cmd_demux_src0_valid), // .valid
  2432. .sink0_channel (cmd_demux_src0_channel), // .channel
  2433. .sink0_data (cmd_demux_src0_data), // .data
  2434. .sink0_startofpacket (cmd_demux_src0_startofpacket), // .startofpacket
  2435. .sink0_endofpacket (cmd_demux_src0_endofpacket), // .endofpacket
  2436. .sink1_ready (cmd_demux_001_src0_ready), // sink1.ready
  2437. .sink1_valid (cmd_demux_001_src0_valid), // .valid
  2438. .sink1_channel (cmd_demux_001_src0_channel), // .channel
  2439. .sink1_data (cmd_demux_001_src0_data), // .data
  2440. .sink1_startofpacket (cmd_demux_001_src0_startofpacket), // .startofpacket
  2441. .sink1_endofpacket (cmd_demux_001_src0_endofpacket) // .endofpacket
  2442. );
  2443. nios2_uc_mm_interconnect_0_cmd_mux cmd_mux_001 (
  2444. .clk (clk_50_clk_clk), // clk.clk
  2445. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2446. .src_ready (cmd_mux_001_src_ready), // src.ready
  2447. .src_valid (cmd_mux_001_src_valid), // .valid
  2448. .src_data (cmd_mux_001_src_data), // .data
  2449. .src_channel (cmd_mux_001_src_channel), // .channel
  2450. .src_startofpacket (cmd_mux_001_src_startofpacket), // .startofpacket
  2451. .src_endofpacket (cmd_mux_001_src_endofpacket), // .endofpacket
  2452. .sink0_ready (cmd_demux_src1_ready), // sink0.ready
  2453. .sink0_valid (cmd_demux_src1_valid), // .valid
  2454. .sink0_channel (cmd_demux_src1_channel), // .channel
  2455. .sink0_data (cmd_demux_src1_data), // .data
  2456. .sink0_startofpacket (cmd_demux_src1_startofpacket), // .startofpacket
  2457. .sink0_endofpacket (cmd_demux_src1_endofpacket), // .endofpacket
  2458. .sink1_ready (cmd_demux_001_src1_ready), // sink1.ready
  2459. .sink1_valid (cmd_demux_001_src1_valid), // .valid
  2460. .sink1_channel (cmd_demux_001_src1_channel), // .channel
  2461. .sink1_data (cmd_demux_001_src1_data), // .data
  2462. .sink1_startofpacket (cmd_demux_001_src1_startofpacket), // .startofpacket
  2463. .sink1_endofpacket (cmd_demux_001_src1_endofpacket) // .endofpacket
  2464. );
  2465. nios2_uc_mm_interconnect_0_cmd_mux cmd_mux_002 (
  2466. .clk (clk_50_clk_clk), // clk.clk
  2467. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2468. .src_ready (cmd_mux_002_src_ready), // src.ready
  2469. .src_valid (cmd_mux_002_src_valid), // .valid
  2470. .src_data (cmd_mux_002_src_data), // .data
  2471. .src_channel (cmd_mux_002_src_channel), // .channel
  2472. .src_startofpacket (cmd_mux_002_src_startofpacket), // .startofpacket
  2473. .src_endofpacket (cmd_mux_002_src_endofpacket), // .endofpacket
  2474. .sink0_ready (cmd_demux_src2_ready), // sink0.ready
  2475. .sink0_valid (cmd_demux_src2_valid), // .valid
  2476. .sink0_channel (cmd_demux_src2_channel), // .channel
  2477. .sink0_data (cmd_demux_src2_data), // .data
  2478. .sink0_startofpacket (cmd_demux_src2_startofpacket), // .startofpacket
  2479. .sink0_endofpacket (cmd_demux_src2_endofpacket), // .endofpacket
  2480. .sink1_ready (cmd_demux_001_src2_ready), // sink1.ready
  2481. .sink1_valid (cmd_demux_001_src2_valid), // .valid
  2482. .sink1_channel (cmd_demux_001_src2_channel), // .channel
  2483. .sink1_data (cmd_demux_001_src2_data), // .data
  2484. .sink1_startofpacket (cmd_demux_001_src2_startofpacket), // .startofpacket
  2485. .sink1_endofpacket (cmd_demux_001_src2_endofpacket) // .endofpacket
  2486. );
  2487. nios2_uc_mm_interconnect_0_cmd_mux cmd_mux_003 (
  2488. .clk (clk_50_clk_clk), // clk.clk
  2489. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2490. .src_ready (cmd_mux_003_src_ready), // src.ready
  2491. .src_valid (cmd_mux_003_src_valid), // .valid
  2492. .src_data (cmd_mux_003_src_data), // .data
  2493. .src_channel (cmd_mux_003_src_channel), // .channel
  2494. .src_startofpacket (cmd_mux_003_src_startofpacket), // .startofpacket
  2495. .src_endofpacket (cmd_mux_003_src_endofpacket), // .endofpacket
  2496. .sink0_ready (cmd_demux_src3_ready), // sink0.ready
  2497. .sink0_valid (cmd_demux_src3_valid), // .valid
  2498. .sink0_channel (cmd_demux_src3_channel), // .channel
  2499. .sink0_data (cmd_demux_src3_data), // .data
  2500. .sink0_startofpacket (cmd_demux_src3_startofpacket), // .startofpacket
  2501. .sink0_endofpacket (cmd_demux_src3_endofpacket), // .endofpacket
  2502. .sink1_ready (cmd_demux_001_src3_ready), // sink1.ready
  2503. .sink1_valid (cmd_demux_001_src3_valid), // .valid
  2504. .sink1_channel (cmd_demux_001_src3_channel), // .channel
  2505. .sink1_data (cmd_demux_001_src3_data), // .data
  2506. .sink1_startofpacket (cmd_demux_001_src3_startofpacket), // .startofpacket
  2507. .sink1_endofpacket (cmd_demux_001_src3_endofpacket) // .endofpacket
  2508. );
  2509. nios2_uc_mm_interconnect_0_cmd_mux cmd_mux_004 (
  2510. .clk (clk_50_clk_clk), // clk.clk
  2511. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2512. .src_ready (cmd_mux_004_src_ready), // src.ready
  2513. .src_valid (cmd_mux_004_src_valid), // .valid
  2514. .src_data (cmd_mux_004_src_data), // .data
  2515. .src_channel (cmd_mux_004_src_channel), // .channel
  2516. .src_startofpacket (cmd_mux_004_src_startofpacket), // .startofpacket
  2517. .src_endofpacket (cmd_mux_004_src_endofpacket), // .endofpacket
  2518. .sink0_ready (cmd_demux_src4_ready), // sink0.ready
  2519. .sink0_valid (cmd_demux_src4_valid), // .valid
  2520. .sink0_channel (cmd_demux_src4_channel), // .channel
  2521. .sink0_data (cmd_demux_src4_data), // .data
  2522. .sink0_startofpacket (cmd_demux_src4_startofpacket), // .startofpacket
  2523. .sink0_endofpacket (cmd_demux_src4_endofpacket), // .endofpacket
  2524. .sink1_ready (cmd_demux_001_src4_ready), // sink1.ready
  2525. .sink1_valid (cmd_demux_001_src4_valid), // .valid
  2526. .sink1_channel (cmd_demux_001_src4_channel), // .channel
  2527. .sink1_data (cmd_demux_001_src4_data), // .data
  2528. .sink1_startofpacket (cmd_demux_001_src4_startofpacket), // .startofpacket
  2529. .sink1_endofpacket (cmd_demux_001_src4_endofpacket) // .endofpacket
  2530. );
  2531. nios2_uc_mm_interconnect_0_cmd_mux cmd_mux_005 (
  2532. .clk (clk_50_clk_clk), // clk.clk
  2533. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2534. .src_ready (cmd_mux_005_src_ready), // src.ready
  2535. .src_valid (cmd_mux_005_src_valid), // .valid
  2536. .src_data (cmd_mux_005_src_data), // .data
  2537. .src_channel (cmd_mux_005_src_channel), // .channel
  2538. .src_startofpacket (cmd_mux_005_src_startofpacket), // .startofpacket
  2539. .src_endofpacket (cmd_mux_005_src_endofpacket), // .endofpacket
  2540. .sink0_ready (cmd_demux_src5_ready), // sink0.ready
  2541. .sink0_valid (cmd_demux_src5_valid), // .valid
  2542. .sink0_channel (cmd_demux_src5_channel), // .channel
  2543. .sink0_data (cmd_demux_src5_data), // .data
  2544. .sink0_startofpacket (cmd_demux_src5_startofpacket), // .startofpacket
  2545. .sink0_endofpacket (cmd_demux_src5_endofpacket), // .endofpacket
  2546. .sink1_ready (cmd_demux_001_src5_ready), // sink1.ready
  2547. .sink1_valid (cmd_demux_001_src5_valid), // .valid
  2548. .sink1_channel (cmd_demux_001_src5_channel), // .channel
  2549. .sink1_data (cmd_demux_001_src5_data), // .data
  2550. .sink1_startofpacket (cmd_demux_001_src5_startofpacket), // .startofpacket
  2551. .sink1_endofpacket (cmd_demux_001_src5_endofpacket) // .endofpacket
  2552. );
  2553. nios2_uc_mm_interconnect_0_cmd_mux cmd_mux_006 (
  2554. .clk (clk_50_clk_clk), // clk.clk
  2555. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2556. .src_ready (cmd_mux_006_src_ready), // src.ready
  2557. .src_valid (cmd_mux_006_src_valid), // .valid
  2558. .src_data (cmd_mux_006_src_data), // .data
  2559. .src_channel (cmd_mux_006_src_channel), // .channel
  2560. .src_startofpacket (cmd_mux_006_src_startofpacket), // .startofpacket
  2561. .src_endofpacket (cmd_mux_006_src_endofpacket), // .endofpacket
  2562. .sink0_ready (cmd_demux_src6_ready), // sink0.ready
  2563. .sink0_valid (cmd_demux_src6_valid), // .valid
  2564. .sink0_channel (cmd_demux_src6_channel), // .channel
  2565. .sink0_data (cmd_demux_src6_data), // .data
  2566. .sink0_startofpacket (cmd_demux_src6_startofpacket), // .startofpacket
  2567. .sink0_endofpacket (cmd_demux_src6_endofpacket), // .endofpacket
  2568. .sink1_ready (cmd_demux_001_src6_ready), // sink1.ready
  2569. .sink1_valid (cmd_demux_001_src6_valid), // .valid
  2570. .sink1_channel (cmd_demux_001_src6_channel), // .channel
  2571. .sink1_data (cmd_demux_001_src6_data), // .data
  2572. .sink1_startofpacket (cmd_demux_001_src6_startofpacket), // .startofpacket
  2573. .sink1_endofpacket (cmd_demux_001_src6_endofpacket) // .endofpacket
  2574. );
  2575. nios2_uc_mm_interconnect_0_rsp_demux rsp_demux (
  2576. .clk (clk_50_clk_clk), // clk.clk
  2577. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2578. .sink_ready (router_002_src_ready), // sink.ready
  2579. .sink_channel (router_002_src_channel), // .channel
  2580. .sink_data (router_002_src_data), // .data
  2581. .sink_startofpacket (router_002_src_startofpacket), // .startofpacket
  2582. .sink_endofpacket (router_002_src_endofpacket), // .endofpacket
  2583. .sink_valid (router_002_src_valid), // .valid
  2584. .src0_ready (rsp_demux_src0_ready), // src0.ready
  2585. .src0_valid (rsp_demux_src0_valid), // .valid
  2586. .src0_data (rsp_demux_src0_data), // .data
  2587. .src0_channel (rsp_demux_src0_channel), // .channel
  2588. .src0_startofpacket (rsp_demux_src0_startofpacket), // .startofpacket
  2589. .src0_endofpacket (rsp_demux_src0_endofpacket), // .endofpacket
  2590. .src1_ready (rsp_demux_src1_ready), // src1.ready
  2591. .src1_valid (rsp_demux_src1_valid), // .valid
  2592. .src1_data (rsp_demux_src1_data), // .data
  2593. .src1_channel (rsp_demux_src1_channel), // .channel
  2594. .src1_startofpacket (rsp_demux_src1_startofpacket), // .startofpacket
  2595. .src1_endofpacket (rsp_demux_src1_endofpacket) // .endofpacket
  2596. );
  2597. nios2_uc_mm_interconnect_0_rsp_demux rsp_demux_001 (
  2598. .clk (clk_50_clk_clk), // clk.clk
  2599. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2600. .sink_ready (router_003_src_ready), // sink.ready
  2601. .sink_channel (router_003_src_channel), // .channel
  2602. .sink_data (router_003_src_data), // .data
  2603. .sink_startofpacket (router_003_src_startofpacket), // .startofpacket
  2604. .sink_endofpacket (router_003_src_endofpacket), // .endofpacket
  2605. .sink_valid (router_003_src_valid), // .valid
  2606. .src0_ready (rsp_demux_001_src0_ready), // src0.ready
  2607. .src0_valid (rsp_demux_001_src0_valid), // .valid
  2608. .src0_data (rsp_demux_001_src0_data), // .data
  2609. .src0_channel (rsp_demux_001_src0_channel), // .channel
  2610. .src0_startofpacket (rsp_demux_001_src0_startofpacket), // .startofpacket
  2611. .src0_endofpacket (rsp_demux_001_src0_endofpacket), // .endofpacket
  2612. .src1_ready (rsp_demux_001_src1_ready), // src1.ready
  2613. .src1_valid (rsp_demux_001_src1_valid), // .valid
  2614. .src1_data (rsp_demux_001_src1_data), // .data
  2615. .src1_channel (rsp_demux_001_src1_channel), // .channel
  2616. .src1_startofpacket (rsp_demux_001_src1_startofpacket), // .startofpacket
  2617. .src1_endofpacket (rsp_demux_001_src1_endofpacket) // .endofpacket
  2618. );
  2619. nios2_uc_mm_interconnect_0_rsp_demux rsp_demux_002 (
  2620. .clk (clk_50_clk_clk), // clk.clk
  2621. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2622. .sink_ready (router_004_src_ready), // sink.ready
  2623. .sink_channel (router_004_src_channel), // .channel
  2624. .sink_data (router_004_src_data), // .data
  2625. .sink_startofpacket (router_004_src_startofpacket), // .startofpacket
  2626. .sink_endofpacket (router_004_src_endofpacket), // .endofpacket
  2627. .sink_valid (router_004_src_valid), // .valid
  2628. .src0_ready (rsp_demux_002_src0_ready), // src0.ready
  2629. .src0_valid (rsp_demux_002_src0_valid), // .valid
  2630. .src0_data (rsp_demux_002_src0_data), // .data
  2631. .src0_channel (rsp_demux_002_src0_channel), // .channel
  2632. .src0_startofpacket (rsp_demux_002_src0_startofpacket), // .startofpacket
  2633. .src0_endofpacket (rsp_demux_002_src0_endofpacket), // .endofpacket
  2634. .src1_ready (rsp_demux_002_src1_ready), // src1.ready
  2635. .src1_valid (rsp_demux_002_src1_valid), // .valid
  2636. .src1_data (rsp_demux_002_src1_data), // .data
  2637. .src1_channel (rsp_demux_002_src1_channel), // .channel
  2638. .src1_startofpacket (rsp_demux_002_src1_startofpacket), // .startofpacket
  2639. .src1_endofpacket (rsp_demux_002_src1_endofpacket) // .endofpacket
  2640. );
  2641. nios2_uc_mm_interconnect_0_rsp_demux rsp_demux_003 (
  2642. .clk (clk_50_clk_clk), // clk.clk
  2643. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2644. .sink_ready (router_005_src_ready), // sink.ready
  2645. .sink_channel (router_005_src_channel), // .channel
  2646. .sink_data (router_005_src_data), // .data
  2647. .sink_startofpacket (router_005_src_startofpacket), // .startofpacket
  2648. .sink_endofpacket (router_005_src_endofpacket), // .endofpacket
  2649. .sink_valid (router_005_src_valid), // .valid
  2650. .src0_ready (rsp_demux_003_src0_ready), // src0.ready
  2651. .src0_valid (rsp_demux_003_src0_valid), // .valid
  2652. .src0_data (rsp_demux_003_src0_data), // .data
  2653. .src0_channel (rsp_demux_003_src0_channel), // .channel
  2654. .src0_startofpacket (rsp_demux_003_src0_startofpacket), // .startofpacket
  2655. .src0_endofpacket (rsp_demux_003_src0_endofpacket), // .endofpacket
  2656. .src1_ready (rsp_demux_003_src1_ready), // src1.ready
  2657. .src1_valid (rsp_demux_003_src1_valid), // .valid
  2658. .src1_data (rsp_demux_003_src1_data), // .data
  2659. .src1_channel (rsp_demux_003_src1_channel), // .channel
  2660. .src1_startofpacket (rsp_demux_003_src1_startofpacket), // .startofpacket
  2661. .src1_endofpacket (rsp_demux_003_src1_endofpacket) // .endofpacket
  2662. );
  2663. nios2_uc_mm_interconnect_0_rsp_demux rsp_demux_004 (
  2664. .clk (clk_50_clk_clk), // clk.clk
  2665. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2666. .sink_ready (router_006_src_ready), // sink.ready
  2667. .sink_channel (router_006_src_channel), // .channel
  2668. .sink_data (router_006_src_data), // .data
  2669. .sink_startofpacket (router_006_src_startofpacket), // .startofpacket
  2670. .sink_endofpacket (router_006_src_endofpacket), // .endofpacket
  2671. .sink_valid (router_006_src_valid), // .valid
  2672. .src0_ready (rsp_demux_004_src0_ready), // src0.ready
  2673. .src0_valid (rsp_demux_004_src0_valid), // .valid
  2674. .src0_data (rsp_demux_004_src0_data), // .data
  2675. .src0_channel (rsp_demux_004_src0_channel), // .channel
  2676. .src0_startofpacket (rsp_demux_004_src0_startofpacket), // .startofpacket
  2677. .src0_endofpacket (rsp_demux_004_src0_endofpacket), // .endofpacket
  2678. .src1_ready (rsp_demux_004_src1_ready), // src1.ready
  2679. .src1_valid (rsp_demux_004_src1_valid), // .valid
  2680. .src1_data (rsp_demux_004_src1_data), // .data
  2681. .src1_channel (rsp_demux_004_src1_channel), // .channel
  2682. .src1_startofpacket (rsp_demux_004_src1_startofpacket), // .startofpacket
  2683. .src1_endofpacket (rsp_demux_004_src1_endofpacket) // .endofpacket
  2684. );
  2685. nios2_uc_mm_interconnect_0_rsp_demux rsp_demux_005 (
  2686. .clk (clk_50_clk_clk), // clk.clk
  2687. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2688. .sink_ready (router_007_src_ready), // sink.ready
  2689. .sink_channel (router_007_src_channel), // .channel
  2690. .sink_data (router_007_src_data), // .data
  2691. .sink_startofpacket (router_007_src_startofpacket), // .startofpacket
  2692. .sink_endofpacket (router_007_src_endofpacket), // .endofpacket
  2693. .sink_valid (router_007_src_valid), // .valid
  2694. .src0_ready (rsp_demux_005_src0_ready), // src0.ready
  2695. .src0_valid (rsp_demux_005_src0_valid), // .valid
  2696. .src0_data (rsp_demux_005_src0_data), // .data
  2697. .src0_channel (rsp_demux_005_src0_channel), // .channel
  2698. .src0_startofpacket (rsp_demux_005_src0_startofpacket), // .startofpacket
  2699. .src0_endofpacket (rsp_demux_005_src0_endofpacket), // .endofpacket
  2700. .src1_ready (rsp_demux_005_src1_ready), // src1.ready
  2701. .src1_valid (rsp_demux_005_src1_valid), // .valid
  2702. .src1_data (rsp_demux_005_src1_data), // .data
  2703. .src1_channel (rsp_demux_005_src1_channel), // .channel
  2704. .src1_startofpacket (rsp_demux_005_src1_startofpacket), // .startofpacket
  2705. .src1_endofpacket (rsp_demux_005_src1_endofpacket) // .endofpacket
  2706. );
  2707. nios2_uc_mm_interconnect_0_rsp_demux rsp_demux_006 (
  2708. .clk (clk_50_clk_clk), // clk.clk
  2709. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2710. .sink_ready (router_008_src_ready), // sink.ready
  2711. .sink_channel (router_008_src_channel), // .channel
  2712. .sink_data (router_008_src_data), // .data
  2713. .sink_startofpacket (router_008_src_startofpacket), // .startofpacket
  2714. .sink_endofpacket (router_008_src_endofpacket), // .endofpacket
  2715. .sink_valid (router_008_src_valid), // .valid
  2716. .src0_ready (rsp_demux_006_src0_ready), // src0.ready
  2717. .src0_valid (rsp_demux_006_src0_valid), // .valid
  2718. .src0_data (rsp_demux_006_src0_data), // .data
  2719. .src0_channel (rsp_demux_006_src0_channel), // .channel
  2720. .src0_startofpacket (rsp_demux_006_src0_startofpacket), // .startofpacket
  2721. .src0_endofpacket (rsp_demux_006_src0_endofpacket), // .endofpacket
  2722. .src1_ready (rsp_demux_006_src1_ready), // src1.ready
  2723. .src1_valid (rsp_demux_006_src1_valid), // .valid
  2724. .src1_data (rsp_demux_006_src1_data), // .data
  2725. .src1_channel (rsp_demux_006_src1_channel), // .channel
  2726. .src1_startofpacket (rsp_demux_006_src1_startofpacket), // .startofpacket
  2727. .src1_endofpacket (rsp_demux_006_src1_endofpacket) // .endofpacket
  2728. );
  2729. nios2_uc_mm_interconnect_0_rsp_mux rsp_mux (
  2730. .clk (clk_50_clk_clk), // clk.clk
  2731. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2732. .src_ready (rsp_mux_src_ready), // src.ready
  2733. .src_valid (rsp_mux_src_valid), // .valid
  2734. .src_data (rsp_mux_src_data), // .data
  2735. .src_channel (rsp_mux_src_channel), // .channel
  2736. .src_startofpacket (rsp_mux_src_startofpacket), // .startofpacket
  2737. .src_endofpacket (rsp_mux_src_endofpacket), // .endofpacket
  2738. .sink0_ready (rsp_demux_src0_ready), // sink0.ready
  2739. .sink0_valid (rsp_demux_src0_valid), // .valid
  2740. .sink0_channel (rsp_demux_src0_channel), // .channel
  2741. .sink0_data (rsp_demux_src0_data), // .data
  2742. .sink0_startofpacket (rsp_demux_src0_startofpacket), // .startofpacket
  2743. .sink0_endofpacket (rsp_demux_src0_endofpacket), // .endofpacket
  2744. .sink1_ready (rsp_demux_001_src0_ready), // sink1.ready
  2745. .sink1_valid (rsp_demux_001_src0_valid), // .valid
  2746. .sink1_channel (rsp_demux_001_src0_channel), // .channel
  2747. .sink1_data (rsp_demux_001_src0_data), // .data
  2748. .sink1_startofpacket (rsp_demux_001_src0_startofpacket), // .startofpacket
  2749. .sink1_endofpacket (rsp_demux_001_src0_endofpacket), // .endofpacket
  2750. .sink2_ready (rsp_demux_002_src0_ready), // sink2.ready
  2751. .sink2_valid (rsp_demux_002_src0_valid), // .valid
  2752. .sink2_channel (rsp_demux_002_src0_channel), // .channel
  2753. .sink2_data (rsp_demux_002_src0_data), // .data
  2754. .sink2_startofpacket (rsp_demux_002_src0_startofpacket), // .startofpacket
  2755. .sink2_endofpacket (rsp_demux_002_src0_endofpacket), // .endofpacket
  2756. .sink3_ready (rsp_demux_003_src0_ready), // sink3.ready
  2757. .sink3_valid (rsp_demux_003_src0_valid), // .valid
  2758. .sink3_channel (rsp_demux_003_src0_channel), // .channel
  2759. .sink3_data (rsp_demux_003_src0_data), // .data
  2760. .sink3_startofpacket (rsp_demux_003_src0_startofpacket), // .startofpacket
  2761. .sink3_endofpacket (rsp_demux_003_src0_endofpacket), // .endofpacket
  2762. .sink4_ready (rsp_demux_004_src0_ready), // sink4.ready
  2763. .sink4_valid (rsp_demux_004_src0_valid), // .valid
  2764. .sink4_channel (rsp_demux_004_src0_channel), // .channel
  2765. .sink4_data (rsp_demux_004_src0_data), // .data
  2766. .sink4_startofpacket (rsp_demux_004_src0_startofpacket), // .startofpacket
  2767. .sink4_endofpacket (rsp_demux_004_src0_endofpacket), // .endofpacket
  2768. .sink5_ready (rsp_demux_005_src0_ready), // sink5.ready
  2769. .sink5_valid (rsp_demux_005_src0_valid), // .valid
  2770. .sink5_channel (rsp_demux_005_src0_channel), // .channel
  2771. .sink5_data (rsp_demux_005_src0_data), // .data
  2772. .sink5_startofpacket (rsp_demux_005_src0_startofpacket), // .startofpacket
  2773. .sink5_endofpacket (rsp_demux_005_src0_endofpacket), // .endofpacket
  2774. .sink6_ready (rsp_demux_006_src0_ready), // sink6.ready
  2775. .sink6_valid (rsp_demux_006_src0_valid), // .valid
  2776. .sink6_channel (rsp_demux_006_src0_channel), // .channel
  2777. .sink6_data (rsp_demux_006_src0_data), // .data
  2778. .sink6_startofpacket (rsp_demux_006_src0_startofpacket), // .startofpacket
  2779. .sink6_endofpacket (rsp_demux_006_src0_endofpacket) // .endofpacket
  2780. );
  2781. nios2_uc_mm_interconnect_0_rsp_mux rsp_mux_001 (
  2782. .clk (clk_50_clk_clk), // clk.clk
  2783. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  2784. .src_ready (rsp_mux_001_src_ready), // src.ready
  2785. .src_valid (rsp_mux_001_src_valid), // .valid
  2786. .src_data (rsp_mux_001_src_data), // .data
  2787. .src_channel (rsp_mux_001_src_channel), // .channel
  2788. .src_startofpacket (rsp_mux_001_src_startofpacket), // .startofpacket
  2789. .src_endofpacket (rsp_mux_001_src_endofpacket), // .endofpacket
  2790. .sink0_ready (rsp_demux_src1_ready), // sink0.ready
  2791. .sink0_valid (rsp_demux_src1_valid), // .valid
  2792. .sink0_channel (rsp_demux_src1_channel), // .channel
  2793. .sink0_data (rsp_demux_src1_data), // .data
  2794. .sink0_startofpacket (rsp_demux_src1_startofpacket), // .startofpacket
  2795. .sink0_endofpacket (rsp_demux_src1_endofpacket), // .endofpacket
  2796. .sink1_ready (rsp_demux_001_src1_ready), // sink1.ready
  2797. .sink1_valid (rsp_demux_001_src1_valid), // .valid
  2798. .sink1_channel (rsp_demux_001_src1_channel), // .channel
  2799. .sink1_data (rsp_demux_001_src1_data), // .data
  2800. .sink1_startofpacket (rsp_demux_001_src1_startofpacket), // .startofpacket
  2801. .sink1_endofpacket (rsp_demux_001_src1_endofpacket), // .endofpacket
  2802. .sink2_ready (rsp_demux_002_src1_ready), // sink2.ready
  2803. .sink2_valid (rsp_demux_002_src1_valid), // .valid
  2804. .sink2_channel (rsp_demux_002_src1_channel), // .channel
  2805. .sink2_data (rsp_demux_002_src1_data), // .data
  2806. .sink2_startofpacket (rsp_demux_002_src1_startofpacket), // .startofpacket
  2807. .sink2_endofpacket (rsp_demux_002_src1_endofpacket), // .endofpacket
  2808. .sink3_ready (rsp_demux_003_src1_ready), // sink3.ready
  2809. .sink3_valid (rsp_demux_003_src1_valid), // .valid
  2810. .sink3_channel (rsp_demux_003_src1_channel), // .channel
  2811. .sink3_data (rsp_demux_003_src1_data), // .data
  2812. .sink3_startofpacket (rsp_demux_003_src1_startofpacket), // .startofpacket
  2813. .sink3_endofpacket (rsp_demux_003_src1_endofpacket), // .endofpacket
  2814. .sink4_ready (rsp_demux_004_src1_ready), // sink4.ready
  2815. .sink4_valid (rsp_demux_004_src1_valid), // .valid
  2816. .sink4_channel (rsp_demux_004_src1_channel), // .channel
  2817. .sink4_data (rsp_demux_004_src1_data), // .data
  2818. .sink4_startofpacket (rsp_demux_004_src1_startofpacket), // .startofpacket
  2819. .sink4_endofpacket (rsp_demux_004_src1_endofpacket), // .endofpacket
  2820. .sink5_ready (rsp_demux_005_src1_ready), // sink5.ready
  2821. .sink5_valid (rsp_demux_005_src1_valid), // .valid
  2822. .sink5_channel (rsp_demux_005_src1_channel), // .channel
  2823. .sink5_data (rsp_demux_005_src1_data), // .data
  2824. .sink5_startofpacket (rsp_demux_005_src1_startofpacket), // .startofpacket
  2825. .sink5_endofpacket (rsp_demux_005_src1_endofpacket), // .endofpacket
  2826. .sink6_ready (rsp_demux_006_src1_ready), // sink6.ready
  2827. .sink6_valid (rsp_demux_006_src1_valid), // .valid
  2828. .sink6_channel (rsp_demux_006_src1_channel), // .channel
  2829. .sink6_data (rsp_demux_006_src1_data), // .data
  2830. .sink6_startofpacket (rsp_demux_006_src1_startofpacket), // .startofpacket
  2831. .sink6_endofpacket (rsp_demux_006_src1_endofpacket) // .endofpacket
  2832. );
  2833. nios2_uc_mm_interconnect_0_avalon_st_adapter #(
  2834. .inBitsPerSymbol (34),
  2835. .inUsePackets (0),
  2836. .inDataWidth (34),
  2837. .inChannelWidth (0),
  2838. .inErrorWidth (0),
  2839. .inUseEmptyPort (0),
  2840. .inUseValid (1),
  2841. .inUseReady (1),
  2842. .inReadyLatency (0),
  2843. .outDataWidth (34),
  2844. .outChannelWidth (0),
  2845. .outErrorWidth (1),
  2846. .outUseEmptyPort (0),
  2847. .outUseValid (1),
  2848. .outUseReady (1),
  2849. .outReadyLatency (0)
  2850. ) avalon_st_adapter (
  2851. .in_clk_0_clk (clk_50_clk_clk), // in_clk_0.clk
  2852. .in_rst_0_reset (nios2_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
  2853. .in_0_data (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data), // in_0.data
  2854. .in_0_valid (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid), // .valid
  2855. .in_0_ready (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready), // .ready
  2856. .out_0_data (avalon_st_adapter_out_0_data), // out_0.data
  2857. .out_0_valid (avalon_st_adapter_out_0_valid), // .valid
  2858. .out_0_ready (avalon_st_adapter_out_0_ready), // .ready
  2859. .out_0_error (avalon_st_adapter_out_0_error) // .error
  2860. );
  2861. nios2_uc_mm_interconnect_0_avalon_st_adapter #(
  2862. .inBitsPerSymbol (34),
  2863. .inUsePackets (0),
  2864. .inDataWidth (34),
  2865. .inChannelWidth (0),
  2866. .inErrorWidth (0),
  2867. .inUseEmptyPort (0),
  2868. .inUseValid (1),
  2869. .inUseReady (1),
  2870. .inReadyLatency (0),
  2871. .outDataWidth (34),
  2872. .outChannelWidth (0),
  2873. .outErrorWidth (1),
  2874. .outUseEmptyPort (0),
  2875. .outUseValid (1),
  2876. .outUseReady (1),
  2877. .outReadyLatency (0)
  2878. ) avalon_st_adapter_001 (
  2879. .in_clk_0_clk (clk_50_clk_clk), // in_clk_0.clk
  2880. .in_rst_0_reset (nios2_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
  2881. .in_0_data (lcd_16207_control_slave_agent_rdata_fifo_src_data), // in_0.data
  2882. .in_0_valid (lcd_16207_control_slave_agent_rdata_fifo_src_valid), // .valid
  2883. .in_0_ready (lcd_16207_control_slave_agent_rdata_fifo_src_ready), // .ready
  2884. .out_0_data (avalon_st_adapter_001_out_0_data), // out_0.data
  2885. .out_0_valid (avalon_st_adapter_001_out_0_valid), // .valid
  2886. .out_0_ready (avalon_st_adapter_001_out_0_ready), // .ready
  2887. .out_0_error (avalon_st_adapter_001_out_0_error) // .error
  2888. );
  2889. nios2_uc_mm_interconnect_0_avalon_st_adapter #(
  2890. .inBitsPerSymbol (34),
  2891. .inUsePackets (0),
  2892. .inDataWidth (34),
  2893. .inChannelWidth (0),
  2894. .inErrorWidth (0),
  2895. .inUseEmptyPort (0),
  2896. .inUseValid (1),
  2897. .inUseReady (1),
  2898. .inReadyLatency (0),
  2899. .outDataWidth (34),
  2900. .outChannelWidth (0),
  2901. .outErrorWidth (1),
  2902. .outUseEmptyPort (0),
  2903. .outUseValid (1),
  2904. .outUseReady (1),
  2905. .outReadyLatency (0)
  2906. ) avalon_st_adapter_002 (
  2907. .in_clk_0_clk (clk_50_clk_clk), // in_clk_0.clk
  2908. .in_rst_0_reset (nios2_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
  2909. .in_0_data (nios2_debug_mem_slave_agent_rdata_fifo_src_data), // in_0.data
  2910. .in_0_valid (nios2_debug_mem_slave_agent_rdata_fifo_src_valid), // .valid
  2911. .in_0_ready (nios2_debug_mem_slave_agent_rdata_fifo_src_ready), // .ready
  2912. .out_0_data (avalon_st_adapter_002_out_0_data), // out_0.data
  2913. .out_0_valid (avalon_st_adapter_002_out_0_valid), // .valid
  2914. .out_0_ready (avalon_st_adapter_002_out_0_ready), // .ready
  2915. .out_0_error (avalon_st_adapter_002_out_0_error) // .error
  2916. );
  2917. nios2_uc_mm_interconnect_0_avalon_st_adapter #(
  2918. .inBitsPerSymbol (34),
  2919. .inUsePackets (0),
  2920. .inDataWidth (34),
  2921. .inChannelWidth (0),
  2922. .inErrorWidth (0),
  2923. .inUseEmptyPort (0),
  2924. .inUseValid (1),
  2925. .inUseReady (1),
  2926. .inReadyLatency (0),
  2927. .outDataWidth (34),
  2928. .outChannelWidth (0),
  2929. .outErrorWidth (1),
  2930. .outUseEmptyPort (0),
  2931. .outUseValid (1),
  2932. .outUseReady (1),
  2933. .outReadyLatency (0)
  2934. ) avalon_st_adapter_003 (
  2935. .in_clk_0_clk (clk_50_clk_clk), // in_clk_0.clk
  2936. .in_rst_0_reset (nios2_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
  2937. .in_0_data (onchip_memory2_s1_agent_rdata_fifo_src_data), // in_0.data
  2938. .in_0_valid (onchip_memory2_s1_agent_rdata_fifo_src_valid), // .valid
  2939. .in_0_ready (onchip_memory2_s1_agent_rdata_fifo_src_ready), // .ready
  2940. .out_0_data (avalon_st_adapter_003_out_0_data), // out_0.data
  2941. .out_0_valid (avalon_st_adapter_003_out_0_valid), // .valid
  2942. .out_0_ready (avalon_st_adapter_003_out_0_ready), // .ready
  2943. .out_0_error (avalon_st_adapter_003_out_0_error) // .error
  2944. );
  2945. nios2_uc_mm_interconnect_0_avalon_st_adapter #(
  2946. .inBitsPerSymbol (34),
  2947. .inUsePackets (0),
  2948. .inDataWidth (34),
  2949. .inChannelWidth (0),
  2950. .inErrorWidth (0),
  2951. .inUseEmptyPort (0),
  2952. .inUseValid (1),
  2953. .inUseReady (1),
  2954. .inReadyLatency (0),
  2955. .outDataWidth (34),
  2956. .outChannelWidth (0),
  2957. .outErrorWidth (1),
  2958. .outUseEmptyPort (0),
  2959. .outUseValid (1),
  2960. .outUseReady (1),
  2961. .outReadyLatency (0)
  2962. ) avalon_st_adapter_004 (
  2963. .in_clk_0_clk (clk_50_clk_clk), // in_clk_0.clk
  2964. .in_rst_0_reset (nios2_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
  2965. .in_0_data (pio_led_s1_agent_rdata_fifo_src_data), // in_0.data
  2966. .in_0_valid (pio_led_s1_agent_rdata_fifo_src_valid), // .valid
  2967. .in_0_ready (pio_led_s1_agent_rdata_fifo_src_ready), // .ready
  2968. .out_0_data (avalon_st_adapter_004_out_0_data), // out_0.data
  2969. .out_0_valid (avalon_st_adapter_004_out_0_valid), // .valid
  2970. .out_0_ready (avalon_st_adapter_004_out_0_ready), // .ready
  2971. .out_0_error (avalon_st_adapter_004_out_0_error) // .error
  2972. );
  2973. nios2_uc_mm_interconnect_0_avalon_st_adapter #(
  2974. .inBitsPerSymbol (34),
  2975. .inUsePackets (0),
  2976. .inDataWidth (34),
  2977. .inChannelWidth (0),
  2978. .inErrorWidth (0),
  2979. .inUseEmptyPort (0),
  2980. .inUseValid (1),
  2981. .inUseReady (1),
  2982. .inReadyLatency (0),
  2983. .outDataWidth (34),
  2984. .outChannelWidth (0),
  2985. .outErrorWidth (1),
  2986. .outUseEmptyPort (0),
  2987. .outUseValid (1),
  2988. .outUseReady (1),
  2989. .outReadyLatency (0)
  2990. ) avalon_st_adapter_005 (
  2991. .in_clk_0_clk (clk_50_clk_clk), // in_clk_0.clk
  2992. .in_rst_0_reset (nios2_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
  2993. .in_0_data (pio_matrix_s1_agent_rdata_fifo_src_data), // in_0.data
  2994. .in_0_valid (pio_matrix_s1_agent_rdata_fifo_src_valid), // .valid
  2995. .in_0_ready (pio_matrix_s1_agent_rdata_fifo_src_ready), // .ready
  2996. .out_0_data (avalon_st_adapter_005_out_0_data), // out_0.data
  2997. .out_0_valid (avalon_st_adapter_005_out_0_valid), // .valid
  2998. .out_0_ready (avalon_st_adapter_005_out_0_ready), // .ready
  2999. .out_0_error (avalon_st_adapter_005_out_0_error) // .error
  3000. );
  3001. nios2_uc_mm_interconnect_0_avalon_st_adapter #(
  3002. .inBitsPerSymbol (34),
  3003. .inUsePackets (0),
  3004. .inDataWidth (34),
  3005. .inChannelWidth (0),
  3006. .inErrorWidth (0),
  3007. .inUseEmptyPort (0),
  3008. .inUseValid (1),
  3009. .inUseReady (1),
  3010. .inReadyLatency (0),
  3011. .outDataWidth (34),
  3012. .outChannelWidth (0),
  3013. .outErrorWidth (1),
  3014. .outUseEmptyPort (0),
  3015. .outUseValid (1),
  3016. .outUseReady (1),
  3017. .outReadyLatency (0)
  3018. ) avalon_st_adapter_006 (
  3019. .in_clk_0_clk (clk_50_clk_clk), // in_clk_0.clk
  3020. .in_rst_0_reset (nios2_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
  3021. .in_0_data (pio_button_s1_agent_rdata_fifo_src_data), // in_0.data
  3022. .in_0_valid (pio_button_s1_agent_rdata_fifo_src_valid), // .valid
  3023. .in_0_ready (pio_button_s1_agent_rdata_fifo_src_ready), // .ready
  3024. .out_0_data (avalon_st_adapter_006_out_0_data), // out_0.data
  3025. .out_0_valid (avalon_st_adapter_006_out_0_valid), // .valid
  3026. .out_0_ready (avalon_st_adapter_006_out_0_ready), // .ready
  3027. .out_0_error (avalon_st_adapter_006_out_0_error) // .error
  3028. );
  3029. endmodule