nios2_uc_mm_interconnect_0.v 168 KB

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  1. // nios2_uc_mm_interconnect_0.v
  2. // This file was auto-generated from altera_mm_interconnect_hw.tcl. If you edit it your changes
  3. // will probably be lost.
  4. //
  5. // Generated using ACDS version 18.1 646
  6. `timescale 1 ps / 1 ps
  7. module nios2_uc_mm_interconnect_0 (
  8. input wire clk_50_clk_clk, // clk_50_clk.clk
  9. input wire nios2_reset_reset_bridge_in_reset_reset, // nios2_reset_reset_bridge_in_reset.reset
  10. input wire [19:0] nios2_data_master_address, // nios2_data_master.address
  11. output wire nios2_data_master_waitrequest, // .waitrequest
  12. input wire [3:0] nios2_data_master_byteenable, // .byteenable
  13. input wire nios2_data_master_read, // .read
  14. output wire [31:0] nios2_data_master_readdata, // .readdata
  15. input wire nios2_data_master_write, // .write
  16. input wire [31:0] nios2_data_master_writedata, // .writedata
  17. input wire nios2_data_master_debugaccess, // .debugaccess
  18. input wire [19:0] nios2_instruction_master_address, // nios2_instruction_master.address
  19. output wire nios2_instruction_master_waitrequest, // .waitrequest
  20. input wire nios2_instruction_master_read, // .read
  21. output wire [31:0] nios2_instruction_master_readdata, // .readdata
  22. output wire [0:0] jtag_uart_avalon_jtag_slave_address, // jtag_uart_avalon_jtag_slave.address
  23. output wire jtag_uart_avalon_jtag_slave_write, // .write
  24. output wire jtag_uart_avalon_jtag_slave_read, // .read
  25. input wire [31:0] jtag_uart_avalon_jtag_slave_readdata, // .readdata
  26. output wire [31:0] jtag_uart_avalon_jtag_slave_writedata, // .writedata
  27. input wire jtag_uart_avalon_jtag_slave_waitrequest, // .waitrequest
  28. output wire jtag_uart_avalon_jtag_slave_chipselect, // .chipselect
  29. output wire [8:0] nios2_debug_mem_slave_address, // nios2_debug_mem_slave.address
  30. output wire nios2_debug_mem_slave_write, // .write
  31. output wire nios2_debug_mem_slave_read, // .read
  32. input wire [31:0] nios2_debug_mem_slave_readdata, // .readdata
  33. output wire [31:0] nios2_debug_mem_slave_writedata, // .writedata
  34. output wire [3:0] nios2_debug_mem_slave_byteenable, // .byteenable
  35. input wire nios2_debug_mem_slave_waitrequest, // .waitrequest
  36. output wire nios2_debug_mem_slave_debugaccess, // .debugaccess
  37. output wire [15:0] onchip_memory2_s1_address, // onchip_memory2_s1.address
  38. output wire onchip_memory2_s1_write, // .write
  39. input wire [31:0] onchip_memory2_s1_readdata, // .readdata
  40. output wire [31:0] onchip_memory2_s1_writedata, // .writedata
  41. output wire [3:0] onchip_memory2_s1_byteenable, // .byteenable
  42. output wire onchip_memory2_s1_chipselect, // .chipselect
  43. output wire onchip_memory2_s1_clken, // .clken
  44. output wire [1:0] pio_LED_s1_address, // pio_LED_s1.address
  45. output wire pio_LED_s1_write, // .write
  46. input wire [31:0] pio_LED_s1_readdata, // .readdata
  47. output wire [31:0] pio_LED_s1_writedata, // .writedata
  48. output wire pio_LED_s1_chipselect // .chipselect
  49. );
  50. wire nios2_data_master_translator_avalon_universal_master_0_waitrequest; // nios2_data_master_agent:av_waitrequest -> nios2_data_master_translator:uav_waitrequest
  51. wire [31:0] nios2_data_master_translator_avalon_universal_master_0_readdata; // nios2_data_master_agent:av_readdata -> nios2_data_master_translator:uav_readdata
  52. wire nios2_data_master_translator_avalon_universal_master_0_debugaccess; // nios2_data_master_translator:uav_debugaccess -> nios2_data_master_agent:av_debugaccess
  53. wire [19:0] nios2_data_master_translator_avalon_universal_master_0_address; // nios2_data_master_translator:uav_address -> nios2_data_master_agent:av_address
  54. wire nios2_data_master_translator_avalon_universal_master_0_read; // nios2_data_master_translator:uav_read -> nios2_data_master_agent:av_read
  55. wire [3:0] nios2_data_master_translator_avalon_universal_master_0_byteenable; // nios2_data_master_translator:uav_byteenable -> nios2_data_master_agent:av_byteenable
  56. wire nios2_data_master_translator_avalon_universal_master_0_readdatavalid; // nios2_data_master_agent:av_readdatavalid -> nios2_data_master_translator:uav_readdatavalid
  57. wire nios2_data_master_translator_avalon_universal_master_0_lock; // nios2_data_master_translator:uav_lock -> nios2_data_master_agent:av_lock
  58. wire nios2_data_master_translator_avalon_universal_master_0_write; // nios2_data_master_translator:uav_write -> nios2_data_master_agent:av_write
  59. wire [31:0] nios2_data_master_translator_avalon_universal_master_0_writedata; // nios2_data_master_translator:uav_writedata -> nios2_data_master_agent:av_writedata
  60. wire [2:0] nios2_data_master_translator_avalon_universal_master_0_burstcount; // nios2_data_master_translator:uav_burstcount -> nios2_data_master_agent:av_burstcount
  61. wire rsp_mux_src_valid; // rsp_mux:src_valid -> nios2_data_master_agent:rp_valid
  62. wire [93:0] rsp_mux_src_data; // rsp_mux:src_data -> nios2_data_master_agent:rp_data
  63. wire rsp_mux_src_ready; // nios2_data_master_agent:rp_ready -> rsp_mux:src_ready
  64. wire [3:0] rsp_mux_src_channel; // rsp_mux:src_channel -> nios2_data_master_agent:rp_channel
  65. wire rsp_mux_src_startofpacket; // rsp_mux:src_startofpacket -> nios2_data_master_agent:rp_startofpacket
  66. wire rsp_mux_src_endofpacket; // rsp_mux:src_endofpacket -> nios2_data_master_agent:rp_endofpacket
  67. wire nios2_instruction_master_translator_avalon_universal_master_0_waitrequest; // nios2_instruction_master_agent:av_waitrequest -> nios2_instruction_master_translator:uav_waitrequest
  68. wire [31:0] nios2_instruction_master_translator_avalon_universal_master_0_readdata; // nios2_instruction_master_agent:av_readdata -> nios2_instruction_master_translator:uav_readdata
  69. wire nios2_instruction_master_translator_avalon_universal_master_0_debugaccess; // nios2_instruction_master_translator:uav_debugaccess -> nios2_instruction_master_agent:av_debugaccess
  70. wire [19:0] nios2_instruction_master_translator_avalon_universal_master_0_address; // nios2_instruction_master_translator:uav_address -> nios2_instruction_master_agent:av_address
  71. wire nios2_instruction_master_translator_avalon_universal_master_0_read; // nios2_instruction_master_translator:uav_read -> nios2_instruction_master_agent:av_read
  72. wire [3:0] nios2_instruction_master_translator_avalon_universal_master_0_byteenable; // nios2_instruction_master_translator:uav_byteenable -> nios2_instruction_master_agent:av_byteenable
  73. wire nios2_instruction_master_translator_avalon_universal_master_0_readdatavalid; // nios2_instruction_master_agent:av_readdatavalid -> nios2_instruction_master_translator:uav_readdatavalid
  74. wire nios2_instruction_master_translator_avalon_universal_master_0_lock; // nios2_instruction_master_translator:uav_lock -> nios2_instruction_master_agent:av_lock
  75. wire nios2_instruction_master_translator_avalon_universal_master_0_write; // nios2_instruction_master_translator:uav_write -> nios2_instruction_master_agent:av_write
  76. wire [31:0] nios2_instruction_master_translator_avalon_universal_master_0_writedata; // nios2_instruction_master_translator:uav_writedata -> nios2_instruction_master_agent:av_writedata
  77. wire [2:0] nios2_instruction_master_translator_avalon_universal_master_0_burstcount; // nios2_instruction_master_translator:uav_burstcount -> nios2_instruction_master_agent:av_burstcount
  78. wire rsp_mux_001_src_valid; // rsp_mux_001:src_valid -> nios2_instruction_master_agent:rp_valid
  79. wire [93:0] rsp_mux_001_src_data; // rsp_mux_001:src_data -> nios2_instruction_master_agent:rp_data
  80. wire rsp_mux_001_src_ready; // nios2_instruction_master_agent:rp_ready -> rsp_mux_001:src_ready
  81. wire [3:0] rsp_mux_001_src_channel; // rsp_mux_001:src_channel -> nios2_instruction_master_agent:rp_channel
  82. wire rsp_mux_001_src_startofpacket; // rsp_mux_001:src_startofpacket -> nios2_instruction_master_agent:rp_startofpacket
  83. wire rsp_mux_001_src_endofpacket; // rsp_mux_001:src_endofpacket -> nios2_instruction_master_agent:rp_endofpacket
  84. wire [31:0] jtag_uart_avalon_jtag_slave_agent_m0_readdata; // jtag_uart_avalon_jtag_slave_translator:uav_readdata -> jtag_uart_avalon_jtag_slave_agent:m0_readdata
  85. wire jtag_uart_avalon_jtag_slave_agent_m0_waitrequest; // jtag_uart_avalon_jtag_slave_translator:uav_waitrequest -> jtag_uart_avalon_jtag_slave_agent:m0_waitrequest
  86. wire jtag_uart_avalon_jtag_slave_agent_m0_debugaccess; // jtag_uart_avalon_jtag_slave_agent:m0_debugaccess -> jtag_uart_avalon_jtag_slave_translator:uav_debugaccess
  87. wire [19:0] jtag_uart_avalon_jtag_slave_agent_m0_address; // jtag_uart_avalon_jtag_slave_agent:m0_address -> jtag_uart_avalon_jtag_slave_translator:uav_address
  88. wire [3:0] jtag_uart_avalon_jtag_slave_agent_m0_byteenable; // jtag_uart_avalon_jtag_slave_agent:m0_byteenable -> jtag_uart_avalon_jtag_slave_translator:uav_byteenable
  89. wire jtag_uart_avalon_jtag_slave_agent_m0_read; // jtag_uart_avalon_jtag_slave_agent:m0_read -> jtag_uart_avalon_jtag_slave_translator:uav_read
  90. wire jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid; // jtag_uart_avalon_jtag_slave_translator:uav_readdatavalid -> jtag_uart_avalon_jtag_slave_agent:m0_readdatavalid
  91. wire jtag_uart_avalon_jtag_slave_agent_m0_lock; // jtag_uart_avalon_jtag_slave_agent:m0_lock -> jtag_uart_avalon_jtag_slave_translator:uav_lock
  92. wire [31:0] jtag_uart_avalon_jtag_slave_agent_m0_writedata; // jtag_uart_avalon_jtag_slave_agent:m0_writedata -> jtag_uart_avalon_jtag_slave_translator:uav_writedata
  93. wire jtag_uart_avalon_jtag_slave_agent_m0_write; // jtag_uart_avalon_jtag_slave_agent:m0_write -> jtag_uart_avalon_jtag_slave_translator:uav_write
  94. wire [2:0] jtag_uart_avalon_jtag_slave_agent_m0_burstcount; // jtag_uart_avalon_jtag_slave_agent:m0_burstcount -> jtag_uart_avalon_jtag_slave_translator:uav_burstcount
  95. wire jtag_uart_avalon_jtag_slave_agent_rf_source_valid; // jtag_uart_avalon_jtag_slave_agent:rf_source_valid -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_valid
  96. wire [94:0] jtag_uart_avalon_jtag_slave_agent_rf_source_data; // jtag_uart_avalon_jtag_slave_agent:rf_source_data -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_data
  97. wire jtag_uart_avalon_jtag_slave_agent_rf_source_ready; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_ready -> jtag_uart_avalon_jtag_slave_agent:rf_source_ready
  98. wire jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket; // jtag_uart_avalon_jtag_slave_agent:rf_source_startofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_startofpacket
  99. wire jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket; // jtag_uart_avalon_jtag_slave_agent:rf_source_endofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_endofpacket
  100. wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_valid -> jtag_uart_avalon_jtag_slave_agent:rf_sink_valid
  101. wire [94:0] jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_data -> jtag_uart_avalon_jtag_slave_agent:rf_sink_data
  102. wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready; // jtag_uart_avalon_jtag_slave_agent:rf_sink_ready -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_ready
  103. wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_startofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_startofpacket
  104. wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_endofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_endofpacket
  105. wire cmd_mux_src_valid; // cmd_mux:src_valid -> jtag_uart_avalon_jtag_slave_agent:cp_valid
  106. wire [93:0] cmd_mux_src_data; // cmd_mux:src_data -> jtag_uart_avalon_jtag_slave_agent:cp_data
  107. wire cmd_mux_src_ready; // jtag_uart_avalon_jtag_slave_agent:cp_ready -> cmd_mux:src_ready
  108. wire [3:0] cmd_mux_src_channel; // cmd_mux:src_channel -> jtag_uart_avalon_jtag_slave_agent:cp_channel
  109. wire cmd_mux_src_startofpacket; // cmd_mux:src_startofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_startofpacket
  110. wire cmd_mux_src_endofpacket; // cmd_mux:src_endofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_endofpacket
  111. wire [31:0] nios2_debug_mem_slave_agent_m0_readdata; // nios2_debug_mem_slave_translator:uav_readdata -> nios2_debug_mem_slave_agent:m0_readdata
  112. wire nios2_debug_mem_slave_agent_m0_waitrequest; // nios2_debug_mem_slave_translator:uav_waitrequest -> nios2_debug_mem_slave_agent:m0_waitrequest
  113. wire nios2_debug_mem_slave_agent_m0_debugaccess; // nios2_debug_mem_slave_agent:m0_debugaccess -> nios2_debug_mem_slave_translator:uav_debugaccess
  114. wire [19:0] nios2_debug_mem_slave_agent_m0_address; // nios2_debug_mem_slave_agent:m0_address -> nios2_debug_mem_slave_translator:uav_address
  115. wire [3:0] nios2_debug_mem_slave_agent_m0_byteenable; // nios2_debug_mem_slave_agent:m0_byteenable -> nios2_debug_mem_slave_translator:uav_byteenable
  116. wire nios2_debug_mem_slave_agent_m0_read; // nios2_debug_mem_slave_agent:m0_read -> nios2_debug_mem_slave_translator:uav_read
  117. wire nios2_debug_mem_slave_agent_m0_readdatavalid; // nios2_debug_mem_slave_translator:uav_readdatavalid -> nios2_debug_mem_slave_agent:m0_readdatavalid
  118. wire nios2_debug_mem_slave_agent_m0_lock; // nios2_debug_mem_slave_agent:m0_lock -> nios2_debug_mem_slave_translator:uav_lock
  119. wire [31:0] nios2_debug_mem_slave_agent_m0_writedata; // nios2_debug_mem_slave_agent:m0_writedata -> nios2_debug_mem_slave_translator:uav_writedata
  120. wire nios2_debug_mem_slave_agent_m0_write; // nios2_debug_mem_slave_agent:m0_write -> nios2_debug_mem_slave_translator:uav_write
  121. wire [2:0] nios2_debug_mem_slave_agent_m0_burstcount; // nios2_debug_mem_slave_agent:m0_burstcount -> nios2_debug_mem_slave_translator:uav_burstcount
  122. wire nios2_debug_mem_slave_agent_rf_source_valid; // nios2_debug_mem_slave_agent:rf_source_valid -> nios2_debug_mem_slave_agent_rsp_fifo:in_valid
  123. wire [94:0] nios2_debug_mem_slave_agent_rf_source_data; // nios2_debug_mem_slave_agent:rf_source_data -> nios2_debug_mem_slave_agent_rsp_fifo:in_data
  124. wire nios2_debug_mem_slave_agent_rf_source_ready; // nios2_debug_mem_slave_agent_rsp_fifo:in_ready -> nios2_debug_mem_slave_agent:rf_source_ready
  125. wire nios2_debug_mem_slave_agent_rf_source_startofpacket; // nios2_debug_mem_slave_agent:rf_source_startofpacket -> nios2_debug_mem_slave_agent_rsp_fifo:in_startofpacket
  126. wire nios2_debug_mem_slave_agent_rf_source_endofpacket; // nios2_debug_mem_slave_agent:rf_source_endofpacket -> nios2_debug_mem_slave_agent_rsp_fifo:in_endofpacket
  127. wire nios2_debug_mem_slave_agent_rsp_fifo_out_valid; // nios2_debug_mem_slave_agent_rsp_fifo:out_valid -> nios2_debug_mem_slave_agent:rf_sink_valid
  128. wire [94:0] nios2_debug_mem_slave_agent_rsp_fifo_out_data; // nios2_debug_mem_slave_agent_rsp_fifo:out_data -> nios2_debug_mem_slave_agent:rf_sink_data
  129. wire nios2_debug_mem_slave_agent_rsp_fifo_out_ready; // nios2_debug_mem_slave_agent:rf_sink_ready -> nios2_debug_mem_slave_agent_rsp_fifo:out_ready
  130. wire nios2_debug_mem_slave_agent_rsp_fifo_out_startofpacket; // nios2_debug_mem_slave_agent_rsp_fifo:out_startofpacket -> nios2_debug_mem_slave_agent:rf_sink_startofpacket
  131. wire nios2_debug_mem_slave_agent_rsp_fifo_out_endofpacket; // nios2_debug_mem_slave_agent_rsp_fifo:out_endofpacket -> nios2_debug_mem_slave_agent:rf_sink_endofpacket
  132. wire cmd_mux_001_src_valid; // cmd_mux_001:src_valid -> nios2_debug_mem_slave_agent:cp_valid
  133. wire [93:0] cmd_mux_001_src_data; // cmd_mux_001:src_data -> nios2_debug_mem_slave_agent:cp_data
  134. wire cmd_mux_001_src_ready; // nios2_debug_mem_slave_agent:cp_ready -> cmd_mux_001:src_ready
  135. wire [3:0] cmd_mux_001_src_channel; // cmd_mux_001:src_channel -> nios2_debug_mem_slave_agent:cp_channel
  136. wire cmd_mux_001_src_startofpacket; // cmd_mux_001:src_startofpacket -> nios2_debug_mem_slave_agent:cp_startofpacket
  137. wire cmd_mux_001_src_endofpacket; // cmd_mux_001:src_endofpacket -> nios2_debug_mem_slave_agent:cp_endofpacket
  138. wire [31:0] onchip_memory2_s1_agent_m0_readdata; // onchip_memory2_s1_translator:uav_readdata -> onchip_memory2_s1_agent:m0_readdata
  139. wire onchip_memory2_s1_agent_m0_waitrequest; // onchip_memory2_s1_translator:uav_waitrequest -> onchip_memory2_s1_agent:m0_waitrequest
  140. wire onchip_memory2_s1_agent_m0_debugaccess; // onchip_memory2_s1_agent:m0_debugaccess -> onchip_memory2_s1_translator:uav_debugaccess
  141. wire [19:0] onchip_memory2_s1_agent_m0_address; // onchip_memory2_s1_agent:m0_address -> onchip_memory2_s1_translator:uav_address
  142. wire [3:0] onchip_memory2_s1_agent_m0_byteenable; // onchip_memory2_s1_agent:m0_byteenable -> onchip_memory2_s1_translator:uav_byteenable
  143. wire onchip_memory2_s1_agent_m0_read; // onchip_memory2_s1_agent:m0_read -> onchip_memory2_s1_translator:uav_read
  144. wire onchip_memory2_s1_agent_m0_readdatavalid; // onchip_memory2_s1_translator:uav_readdatavalid -> onchip_memory2_s1_agent:m0_readdatavalid
  145. wire onchip_memory2_s1_agent_m0_lock; // onchip_memory2_s1_agent:m0_lock -> onchip_memory2_s1_translator:uav_lock
  146. wire [31:0] onchip_memory2_s1_agent_m0_writedata; // onchip_memory2_s1_agent:m0_writedata -> onchip_memory2_s1_translator:uav_writedata
  147. wire onchip_memory2_s1_agent_m0_write; // onchip_memory2_s1_agent:m0_write -> onchip_memory2_s1_translator:uav_write
  148. wire [2:0] onchip_memory2_s1_agent_m0_burstcount; // onchip_memory2_s1_agent:m0_burstcount -> onchip_memory2_s1_translator:uav_burstcount
  149. wire onchip_memory2_s1_agent_rf_source_valid; // onchip_memory2_s1_agent:rf_source_valid -> onchip_memory2_s1_agent_rsp_fifo:in_valid
  150. wire [94:0] onchip_memory2_s1_agent_rf_source_data; // onchip_memory2_s1_agent:rf_source_data -> onchip_memory2_s1_agent_rsp_fifo:in_data
  151. wire onchip_memory2_s1_agent_rf_source_ready; // onchip_memory2_s1_agent_rsp_fifo:in_ready -> onchip_memory2_s1_agent:rf_source_ready
  152. wire onchip_memory2_s1_agent_rf_source_startofpacket; // onchip_memory2_s1_agent:rf_source_startofpacket -> onchip_memory2_s1_agent_rsp_fifo:in_startofpacket
  153. wire onchip_memory2_s1_agent_rf_source_endofpacket; // onchip_memory2_s1_agent:rf_source_endofpacket -> onchip_memory2_s1_agent_rsp_fifo:in_endofpacket
  154. wire onchip_memory2_s1_agent_rsp_fifo_out_valid; // onchip_memory2_s1_agent_rsp_fifo:out_valid -> onchip_memory2_s1_agent:rf_sink_valid
  155. wire [94:0] onchip_memory2_s1_agent_rsp_fifo_out_data; // onchip_memory2_s1_agent_rsp_fifo:out_data -> onchip_memory2_s1_agent:rf_sink_data
  156. wire onchip_memory2_s1_agent_rsp_fifo_out_ready; // onchip_memory2_s1_agent:rf_sink_ready -> onchip_memory2_s1_agent_rsp_fifo:out_ready
  157. wire onchip_memory2_s1_agent_rsp_fifo_out_startofpacket; // onchip_memory2_s1_agent_rsp_fifo:out_startofpacket -> onchip_memory2_s1_agent:rf_sink_startofpacket
  158. wire onchip_memory2_s1_agent_rsp_fifo_out_endofpacket; // onchip_memory2_s1_agent_rsp_fifo:out_endofpacket -> onchip_memory2_s1_agent:rf_sink_endofpacket
  159. wire cmd_mux_002_src_valid; // cmd_mux_002:src_valid -> onchip_memory2_s1_agent:cp_valid
  160. wire [93:0] cmd_mux_002_src_data; // cmd_mux_002:src_data -> onchip_memory2_s1_agent:cp_data
  161. wire cmd_mux_002_src_ready; // onchip_memory2_s1_agent:cp_ready -> cmd_mux_002:src_ready
  162. wire [3:0] cmd_mux_002_src_channel; // cmd_mux_002:src_channel -> onchip_memory2_s1_agent:cp_channel
  163. wire cmd_mux_002_src_startofpacket; // cmd_mux_002:src_startofpacket -> onchip_memory2_s1_agent:cp_startofpacket
  164. wire cmd_mux_002_src_endofpacket; // cmd_mux_002:src_endofpacket -> onchip_memory2_s1_agent:cp_endofpacket
  165. wire [31:0] pio_led_s1_agent_m0_readdata; // pio_LED_s1_translator:uav_readdata -> pio_LED_s1_agent:m0_readdata
  166. wire pio_led_s1_agent_m0_waitrequest; // pio_LED_s1_translator:uav_waitrequest -> pio_LED_s1_agent:m0_waitrequest
  167. wire pio_led_s1_agent_m0_debugaccess; // pio_LED_s1_agent:m0_debugaccess -> pio_LED_s1_translator:uav_debugaccess
  168. wire [19:0] pio_led_s1_agent_m0_address; // pio_LED_s1_agent:m0_address -> pio_LED_s1_translator:uav_address
  169. wire [3:0] pio_led_s1_agent_m0_byteenable; // pio_LED_s1_agent:m0_byteenable -> pio_LED_s1_translator:uav_byteenable
  170. wire pio_led_s1_agent_m0_read; // pio_LED_s1_agent:m0_read -> pio_LED_s1_translator:uav_read
  171. wire pio_led_s1_agent_m0_readdatavalid; // pio_LED_s1_translator:uav_readdatavalid -> pio_LED_s1_agent:m0_readdatavalid
  172. wire pio_led_s1_agent_m0_lock; // pio_LED_s1_agent:m0_lock -> pio_LED_s1_translator:uav_lock
  173. wire [31:0] pio_led_s1_agent_m0_writedata; // pio_LED_s1_agent:m0_writedata -> pio_LED_s1_translator:uav_writedata
  174. wire pio_led_s1_agent_m0_write; // pio_LED_s1_agent:m0_write -> pio_LED_s1_translator:uav_write
  175. wire [2:0] pio_led_s1_agent_m0_burstcount; // pio_LED_s1_agent:m0_burstcount -> pio_LED_s1_translator:uav_burstcount
  176. wire pio_led_s1_agent_rf_source_valid; // pio_LED_s1_agent:rf_source_valid -> pio_LED_s1_agent_rsp_fifo:in_valid
  177. wire [94:0] pio_led_s1_agent_rf_source_data; // pio_LED_s1_agent:rf_source_data -> pio_LED_s1_agent_rsp_fifo:in_data
  178. wire pio_led_s1_agent_rf_source_ready; // pio_LED_s1_agent_rsp_fifo:in_ready -> pio_LED_s1_agent:rf_source_ready
  179. wire pio_led_s1_agent_rf_source_startofpacket; // pio_LED_s1_agent:rf_source_startofpacket -> pio_LED_s1_agent_rsp_fifo:in_startofpacket
  180. wire pio_led_s1_agent_rf_source_endofpacket; // pio_LED_s1_agent:rf_source_endofpacket -> pio_LED_s1_agent_rsp_fifo:in_endofpacket
  181. wire pio_led_s1_agent_rsp_fifo_out_valid; // pio_LED_s1_agent_rsp_fifo:out_valid -> pio_LED_s1_agent:rf_sink_valid
  182. wire [94:0] pio_led_s1_agent_rsp_fifo_out_data; // pio_LED_s1_agent_rsp_fifo:out_data -> pio_LED_s1_agent:rf_sink_data
  183. wire pio_led_s1_agent_rsp_fifo_out_ready; // pio_LED_s1_agent:rf_sink_ready -> pio_LED_s1_agent_rsp_fifo:out_ready
  184. wire pio_led_s1_agent_rsp_fifo_out_startofpacket; // pio_LED_s1_agent_rsp_fifo:out_startofpacket -> pio_LED_s1_agent:rf_sink_startofpacket
  185. wire pio_led_s1_agent_rsp_fifo_out_endofpacket; // pio_LED_s1_agent_rsp_fifo:out_endofpacket -> pio_LED_s1_agent:rf_sink_endofpacket
  186. wire cmd_mux_003_src_valid; // cmd_mux_003:src_valid -> pio_LED_s1_agent:cp_valid
  187. wire [93:0] cmd_mux_003_src_data; // cmd_mux_003:src_data -> pio_LED_s1_agent:cp_data
  188. wire cmd_mux_003_src_ready; // pio_LED_s1_agent:cp_ready -> cmd_mux_003:src_ready
  189. wire [3:0] cmd_mux_003_src_channel; // cmd_mux_003:src_channel -> pio_LED_s1_agent:cp_channel
  190. wire cmd_mux_003_src_startofpacket; // cmd_mux_003:src_startofpacket -> pio_LED_s1_agent:cp_startofpacket
  191. wire cmd_mux_003_src_endofpacket; // cmd_mux_003:src_endofpacket -> pio_LED_s1_agent:cp_endofpacket
  192. wire nios2_data_master_agent_cp_valid; // nios2_data_master_agent:cp_valid -> router:sink_valid
  193. wire [93:0] nios2_data_master_agent_cp_data; // nios2_data_master_agent:cp_data -> router:sink_data
  194. wire nios2_data_master_agent_cp_ready; // router:sink_ready -> nios2_data_master_agent:cp_ready
  195. wire nios2_data_master_agent_cp_startofpacket; // nios2_data_master_agent:cp_startofpacket -> router:sink_startofpacket
  196. wire nios2_data_master_agent_cp_endofpacket; // nios2_data_master_agent:cp_endofpacket -> router:sink_endofpacket
  197. wire router_src_valid; // router:src_valid -> cmd_demux:sink_valid
  198. wire [93:0] router_src_data; // router:src_data -> cmd_demux:sink_data
  199. wire router_src_ready; // cmd_demux:sink_ready -> router:src_ready
  200. wire [3:0] router_src_channel; // router:src_channel -> cmd_demux:sink_channel
  201. wire router_src_startofpacket; // router:src_startofpacket -> cmd_demux:sink_startofpacket
  202. wire router_src_endofpacket; // router:src_endofpacket -> cmd_demux:sink_endofpacket
  203. wire nios2_instruction_master_agent_cp_valid; // nios2_instruction_master_agent:cp_valid -> router_001:sink_valid
  204. wire [93:0] nios2_instruction_master_agent_cp_data; // nios2_instruction_master_agent:cp_data -> router_001:sink_data
  205. wire nios2_instruction_master_agent_cp_ready; // router_001:sink_ready -> nios2_instruction_master_agent:cp_ready
  206. wire nios2_instruction_master_agent_cp_startofpacket; // nios2_instruction_master_agent:cp_startofpacket -> router_001:sink_startofpacket
  207. wire nios2_instruction_master_agent_cp_endofpacket; // nios2_instruction_master_agent:cp_endofpacket -> router_001:sink_endofpacket
  208. wire router_001_src_valid; // router_001:src_valid -> cmd_demux_001:sink_valid
  209. wire [93:0] router_001_src_data; // router_001:src_data -> cmd_demux_001:sink_data
  210. wire router_001_src_ready; // cmd_demux_001:sink_ready -> router_001:src_ready
  211. wire [3:0] router_001_src_channel; // router_001:src_channel -> cmd_demux_001:sink_channel
  212. wire router_001_src_startofpacket; // router_001:src_startofpacket -> cmd_demux_001:sink_startofpacket
  213. wire router_001_src_endofpacket; // router_001:src_endofpacket -> cmd_demux_001:sink_endofpacket
  214. wire jtag_uart_avalon_jtag_slave_agent_rp_valid; // jtag_uart_avalon_jtag_slave_agent:rp_valid -> router_002:sink_valid
  215. wire [93:0] jtag_uart_avalon_jtag_slave_agent_rp_data; // jtag_uart_avalon_jtag_slave_agent:rp_data -> router_002:sink_data
  216. wire jtag_uart_avalon_jtag_slave_agent_rp_ready; // router_002:sink_ready -> jtag_uart_avalon_jtag_slave_agent:rp_ready
  217. wire jtag_uart_avalon_jtag_slave_agent_rp_startofpacket; // jtag_uart_avalon_jtag_slave_agent:rp_startofpacket -> router_002:sink_startofpacket
  218. wire jtag_uart_avalon_jtag_slave_agent_rp_endofpacket; // jtag_uart_avalon_jtag_slave_agent:rp_endofpacket -> router_002:sink_endofpacket
  219. wire router_002_src_valid; // router_002:src_valid -> rsp_demux:sink_valid
  220. wire [93:0] router_002_src_data; // router_002:src_data -> rsp_demux:sink_data
  221. wire router_002_src_ready; // rsp_demux:sink_ready -> router_002:src_ready
  222. wire [3:0] router_002_src_channel; // router_002:src_channel -> rsp_demux:sink_channel
  223. wire router_002_src_startofpacket; // router_002:src_startofpacket -> rsp_demux:sink_startofpacket
  224. wire router_002_src_endofpacket; // router_002:src_endofpacket -> rsp_demux:sink_endofpacket
  225. wire nios2_debug_mem_slave_agent_rp_valid; // nios2_debug_mem_slave_agent:rp_valid -> router_003:sink_valid
  226. wire [93:0] nios2_debug_mem_slave_agent_rp_data; // nios2_debug_mem_slave_agent:rp_data -> router_003:sink_data
  227. wire nios2_debug_mem_slave_agent_rp_ready; // router_003:sink_ready -> nios2_debug_mem_slave_agent:rp_ready
  228. wire nios2_debug_mem_slave_agent_rp_startofpacket; // nios2_debug_mem_slave_agent:rp_startofpacket -> router_003:sink_startofpacket
  229. wire nios2_debug_mem_slave_agent_rp_endofpacket; // nios2_debug_mem_slave_agent:rp_endofpacket -> router_003:sink_endofpacket
  230. wire router_003_src_valid; // router_003:src_valid -> rsp_demux_001:sink_valid
  231. wire [93:0] router_003_src_data; // router_003:src_data -> rsp_demux_001:sink_data
  232. wire router_003_src_ready; // rsp_demux_001:sink_ready -> router_003:src_ready
  233. wire [3:0] router_003_src_channel; // router_003:src_channel -> rsp_demux_001:sink_channel
  234. wire router_003_src_startofpacket; // router_003:src_startofpacket -> rsp_demux_001:sink_startofpacket
  235. wire router_003_src_endofpacket; // router_003:src_endofpacket -> rsp_demux_001:sink_endofpacket
  236. wire onchip_memory2_s1_agent_rp_valid; // onchip_memory2_s1_agent:rp_valid -> router_004:sink_valid
  237. wire [93:0] onchip_memory2_s1_agent_rp_data; // onchip_memory2_s1_agent:rp_data -> router_004:sink_data
  238. wire onchip_memory2_s1_agent_rp_ready; // router_004:sink_ready -> onchip_memory2_s1_agent:rp_ready
  239. wire onchip_memory2_s1_agent_rp_startofpacket; // onchip_memory2_s1_agent:rp_startofpacket -> router_004:sink_startofpacket
  240. wire onchip_memory2_s1_agent_rp_endofpacket; // onchip_memory2_s1_agent:rp_endofpacket -> router_004:sink_endofpacket
  241. wire router_004_src_valid; // router_004:src_valid -> rsp_demux_002:sink_valid
  242. wire [93:0] router_004_src_data; // router_004:src_data -> rsp_demux_002:sink_data
  243. wire router_004_src_ready; // rsp_demux_002:sink_ready -> router_004:src_ready
  244. wire [3:0] router_004_src_channel; // router_004:src_channel -> rsp_demux_002:sink_channel
  245. wire router_004_src_startofpacket; // router_004:src_startofpacket -> rsp_demux_002:sink_startofpacket
  246. wire router_004_src_endofpacket; // router_004:src_endofpacket -> rsp_demux_002:sink_endofpacket
  247. wire pio_led_s1_agent_rp_valid; // pio_LED_s1_agent:rp_valid -> router_005:sink_valid
  248. wire [93:0] pio_led_s1_agent_rp_data; // pio_LED_s1_agent:rp_data -> router_005:sink_data
  249. wire pio_led_s1_agent_rp_ready; // router_005:sink_ready -> pio_LED_s1_agent:rp_ready
  250. wire pio_led_s1_agent_rp_startofpacket; // pio_LED_s1_agent:rp_startofpacket -> router_005:sink_startofpacket
  251. wire pio_led_s1_agent_rp_endofpacket; // pio_LED_s1_agent:rp_endofpacket -> router_005:sink_endofpacket
  252. wire router_005_src_valid; // router_005:src_valid -> rsp_demux_003:sink_valid
  253. wire [93:0] router_005_src_data; // router_005:src_data -> rsp_demux_003:sink_data
  254. wire router_005_src_ready; // rsp_demux_003:sink_ready -> router_005:src_ready
  255. wire [3:0] router_005_src_channel; // router_005:src_channel -> rsp_demux_003:sink_channel
  256. wire router_005_src_startofpacket; // router_005:src_startofpacket -> rsp_demux_003:sink_startofpacket
  257. wire router_005_src_endofpacket; // router_005:src_endofpacket -> rsp_demux_003:sink_endofpacket
  258. wire cmd_demux_src0_valid; // cmd_demux:src0_valid -> cmd_mux:sink0_valid
  259. wire [93:0] cmd_demux_src0_data; // cmd_demux:src0_data -> cmd_mux:sink0_data
  260. wire cmd_demux_src0_ready; // cmd_mux:sink0_ready -> cmd_demux:src0_ready
  261. wire [3:0] cmd_demux_src0_channel; // cmd_demux:src0_channel -> cmd_mux:sink0_channel
  262. wire cmd_demux_src0_startofpacket; // cmd_demux:src0_startofpacket -> cmd_mux:sink0_startofpacket
  263. wire cmd_demux_src0_endofpacket; // cmd_demux:src0_endofpacket -> cmd_mux:sink0_endofpacket
  264. wire cmd_demux_src1_valid; // cmd_demux:src1_valid -> cmd_mux_001:sink0_valid
  265. wire [93:0] cmd_demux_src1_data; // cmd_demux:src1_data -> cmd_mux_001:sink0_data
  266. wire cmd_demux_src1_ready; // cmd_mux_001:sink0_ready -> cmd_demux:src1_ready
  267. wire [3:0] cmd_demux_src1_channel; // cmd_demux:src1_channel -> cmd_mux_001:sink0_channel
  268. wire cmd_demux_src1_startofpacket; // cmd_demux:src1_startofpacket -> cmd_mux_001:sink0_startofpacket
  269. wire cmd_demux_src1_endofpacket; // cmd_demux:src1_endofpacket -> cmd_mux_001:sink0_endofpacket
  270. wire cmd_demux_src2_valid; // cmd_demux:src2_valid -> cmd_mux_002:sink0_valid
  271. wire [93:0] cmd_demux_src2_data; // cmd_demux:src2_data -> cmd_mux_002:sink0_data
  272. wire cmd_demux_src2_ready; // cmd_mux_002:sink0_ready -> cmd_demux:src2_ready
  273. wire [3:0] cmd_demux_src2_channel; // cmd_demux:src2_channel -> cmd_mux_002:sink0_channel
  274. wire cmd_demux_src2_startofpacket; // cmd_demux:src2_startofpacket -> cmd_mux_002:sink0_startofpacket
  275. wire cmd_demux_src2_endofpacket; // cmd_demux:src2_endofpacket -> cmd_mux_002:sink0_endofpacket
  276. wire cmd_demux_src3_valid; // cmd_demux:src3_valid -> cmd_mux_003:sink0_valid
  277. wire [93:0] cmd_demux_src3_data; // cmd_demux:src3_data -> cmd_mux_003:sink0_data
  278. wire cmd_demux_src3_ready; // cmd_mux_003:sink0_ready -> cmd_demux:src3_ready
  279. wire [3:0] cmd_demux_src3_channel; // cmd_demux:src3_channel -> cmd_mux_003:sink0_channel
  280. wire cmd_demux_src3_startofpacket; // cmd_demux:src3_startofpacket -> cmd_mux_003:sink0_startofpacket
  281. wire cmd_demux_src3_endofpacket; // cmd_demux:src3_endofpacket -> cmd_mux_003:sink0_endofpacket
  282. wire cmd_demux_001_src0_valid; // cmd_demux_001:src0_valid -> cmd_mux:sink1_valid
  283. wire [93:0] cmd_demux_001_src0_data; // cmd_demux_001:src0_data -> cmd_mux:sink1_data
  284. wire cmd_demux_001_src0_ready; // cmd_mux:sink1_ready -> cmd_demux_001:src0_ready
  285. wire [3:0] cmd_demux_001_src0_channel; // cmd_demux_001:src0_channel -> cmd_mux:sink1_channel
  286. wire cmd_demux_001_src0_startofpacket; // cmd_demux_001:src0_startofpacket -> cmd_mux:sink1_startofpacket
  287. wire cmd_demux_001_src0_endofpacket; // cmd_demux_001:src0_endofpacket -> cmd_mux:sink1_endofpacket
  288. wire cmd_demux_001_src1_valid; // cmd_demux_001:src1_valid -> cmd_mux_001:sink1_valid
  289. wire [93:0] cmd_demux_001_src1_data; // cmd_demux_001:src1_data -> cmd_mux_001:sink1_data
  290. wire cmd_demux_001_src1_ready; // cmd_mux_001:sink1_ready -> cmd_demux_001:src1_ready
  291. wire [3:0] cmd_demux_001_src1_channel; // cmd_demux_001:src1_channel -> cmd_mux_001:sink1_channel
  292. wire cmd_demux_001_src1_startofpacket; // cmd_demux_001:src1_startofpacket -> cmd_mux_001:sink1_startofpacket
  293. wire cmd_demux_001_src1_endofpacket; // cmd_demux_001:src1_endofpacket -> cmd_mux_001:sink1_endofpacket
  294. wire cmd_demux_001_src2_valid; // cmd_demux_001:src2_valid -> cmd_mux_002:sink1_valid
  295. wire [93:0] cmd_demux_001_src2_data; // cmd_demux_001:src2_data -> cmd_mux_002:sink1_data
  296. wire cmd_demux_001_src2_ready; // cmd_mux_002:sink1_ready -> cmd_demux_001:src2_ready
  297. wire [3:0] cmd_demux_001_src2_channel; // cmd_demux_001:src2_channel -> cmd_mux_002:sink1_channel
  298. wire cmd_demux_001_src2_startofpacket; // cmd_demux_001:src2_startofpacket -> cmd_mux_002:sink1_startofpacket
  299. wire cmd_demux_001_src2_endofpacket; // cmd_demux_001:src2_endofpacket -> cmd_mux_002:sink1_endofpacket
  300. wire cmd_demux_001_src3_valid; // cmd_demux_001:src3_valid -> cmd_mux_003:sink1_valid
  301. wire [93:0] cmd_demux_001_src3_data; // cmd_demux_001:src3_data -> cmd_mux_003:sink1_data
  302. wire cmd_demux_001_src3_ready; // cmd_mux_003:sink1_ready -> cmd_demux_001:src3_ready
  303. wire [3:0] cmd_demux_001_src3_channel; // cmd_demux_001:src3_channel -> cmd_mux_003:sink1_channel
  304. wire cmd_demux_001_src3_startofpacket; // cmd_demux_001:src3_startofpacket -> cmd_mux_003:sink1_startofpacket
  305. wire cmd_demux_001_src3_endofpacket; // cmd_demux_001:src3_endofpacket -> cmd_mux_003:sink1_endofpacket
  306. wire rsp_demux_src0_valid; // rsp_demux:src0_valid -> rsp_mux:sink0_valid
  307. wire [93:0] rsp_demux_src0_data; // rsp_demux:src0_data -> rsp_mux:sink0_data
  308. wire rsp_demux_src0_ready; // rsp_mux:sink0_ready -> rsp_demux:src0_ready
  309. wire [3:0] rsp_demux_src0_channel; // rsp_demux:src0_channel -> rsp_mux:sink0_channel
  310. wire rsp_demux_src0_startofpacket; // rsp_demux:src0_startofpacket -> rsp_mux:sink0_startofpacket
  311. wire rsp_demux_src0_endofpacket; // rsp_demux:src0_endofpacket -> rsp_mux:sink0_endofpacket
  312. wire rsp_demux_src1_valid; // rsp_demux:src1_valid -> rsp_mux_001:sink0_valid
  313. wire [93:0] rsp_demux_src1_data; // rsp_demux:src1_data -> rsp_mux_001:sink0_data
  314. wire rsp_demux_src1_ready; // rsp_mux_001:sink0_ready -> rsp_demux:src1_ready
  315. wire [3:0] rsp_demux_src1_channel; // rsp_demux:src1_channel -> rsp_mux_001:sink0_channel
  316. wire rsp_demux_src1_startofpacket; // rsp_demux:src1_startofpacket -> rsp_mux_001:sink0_startofpacket
  317. wire rsp_demux_src1_endofpacket; // rsp_demux:src1_endofpacket -> rsp_mux_001:sink0_endofpacket
  318. wire rsp_demux_001_src0_valid; // rsp_demux_001:src0_valid -> rsp_mux:sink1_valid
  319. wire [93:0] rsp_demux_001_src0_data; // rsp_demux_001:src0_data -> rsp_mux:sink1_data
  320. wire rsp_demux_001_src0_ready; // rsp_mux:sink1_ready -> rsp_demux_001:src0_ready
  321. wire [3:0] rsp_demux_001_src0_channel; // rsp_demux_001:src0_channel -> rsp_mux:sink1_channel
  322. wire rsp_demux_001_src0_startofpacket; // rsp_demux_001:src0_startofpacket -> rsp_mux:sink1_startofpacket
  323. wire rsp_demux_001_src0_endofpacket; // rsp_demux_001:src0_endofpacket -> rsp_mux:sink1_endofpacket
  324. wire rsp_demux_001_src1_valid; // rsp_demux_001:src1_valid -> rsp_mux_001:sink1_valid
  325. wire [93:0] rsp_demux_001_src1_data; // rsp_demux_001:src1_data -> rsp_mux_001:sink1_data
  326. wire rsp_demux_001_src1_ready; // rsp_mux_001:sink1_ready -> rsp_demux_001:src1_ready
  327. wire [3:0] rsp_demux_001_src1_channel; // rsp_demux_001:src1_channel -> rsp_mux_001:sink1_channel
  328. wire rsp_demux_001_src1_startofpacket; // rsp_demux_001:src1_startofpacket -> rsp_mux_001:sink1_startofpacket
  329. wire rsp_demux_001_src1_endofpacket; // rsp_demux_001:src1_endofpacket -> rsp_mux_001:sink1_endofpacket
  330. wire rsp_demux_002_src0_valid; // rsp_demux_002:src0_valid -> rsp_mux:sink2_valid
  331. wire [93:0] rsp_demux_002_src0_data; // rsp_demux_002:src0_data -> rsp_mux:sink2_data
  332. wire rsp_demux_002_src0_ready; // rsp_mux:sink2_ready -> rsp_demux_002:src0_ready
  333. wire [3:0] rsp_demux_002_src0_channel; // rsp_demux_002:src0_channel -> rsp_mux:sink2_channel
  334. wire rsp_demux_002_src0_startofpacket; // rsp_demux_002:src0_startofpacket -> rsp_mux:sink2_startofpacket
  335. wire rsp_demux_002_src0_endofpacket; // rsp_demux_002:src0_endofpacket -> rsp_mux:sink2_endofpacket
  336. wire rsp_demux_002_src1_valid; // rsp_demux_002:src1_valid -> rsp_mux_001:sink2_valid
  337. wire [93:0] rsp_demux_002_src1_data; // rsp_demux_002:src1_data -> rsp_mux_001:sink2_data
  338. wire rsp_demux_002_src1_ready; // rsp_mux_001:sink2_ready -> rsp_demux_002:src1_ready
  339. wire [3:0] rsp_demux_002_src1_channel; // rsp_demux_002:src1_channel -> rsp_mux_001:sink2_channel
  340. wire rsp_demux_002_src1_startofpacket; // rsp_demux_002:src1_startofpacket -> rsp_mux_001:sink2_startofpacket
  341. wire rsp_demux_002_src1_endofpacket; // rsp_demux_002:src1_endofpacket -> rsp_mux_001:sink2_endofpacket
  342. wire rsp_demux_003_src0_valid; // rsp_demux_003:src0_valid -> rsp_mux:sink3_valid
  343. wire [93:0] rsp_demux_003_src0_data; // rsp_demux_003:src0_data -> rsp_mux:sink3_data
  344. wire rsp_demux_003_src0_ready; // rsp_mux:sink3_ready -> rsp_demux_003:src0_ready
  345. wire [3:0] rsp_demux_003_src0_channel; // rsp_demux_003:src0_channel -> rsp_mux:sink3_channel
  346. wire rsp_demux_003_src0_startofpacket; // rsp_demux_003:src0_startofpacket -> rsp_mux:sink3_startofpacket
  347. wire rsp_demux_003_src0_endofpacket; // rsp_demux_003:src0_endofpacket -> rsp_mux:sink3_endofpacket
  348. wire rsp_demux_003_src1_valid; // rsp_demux_003:src1_valid -> rsp_mux_001:sink3_valid
  349. wire [93:0] rsp_demux_003_src1_data; // rsp_demux_003:src1_data -> rsp_mux_001:sink3_data
  350. wire rsp_demux_003_src1_ready; // rsp_mux_001:sink3_ready -> rsp_demux_003:src1_ready
  351. wire [3:0] rsp_demux_003_src1_channel; // rsp_demux_003:src1_channel -> rsp_mux_001:sink3_channel
  352. wire rsp_demux_003_src1_startofpacket; // rsp_demux_003:src1_startofpacket -> rsp_mux_001:sink3_startofpacket
  353. wire rsp_demux_003_src1_endofpacket; // rsp_demux_003:src1_endofpacket -> rsp_mux_001:sink3_endofpacket
  354. wire jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid; // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_valid -> avalon_st_adapter:in_0_valid
  355. wire [33:0] jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data; // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_data -> avalon_st_adapter:in_0_data
  356. wire jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready; // avalon_st_adapter:in_0_ready -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_ready
  357. wire avalon_st_adapter_out_0_valid; // avalon_st_adapter:out_0_valid -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_valid
  358. wire [33:0] avalon_st_adapter_out_0_data; // avalon_st_adapter:out_0_data -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_data
  359. wire avalon_st_adapter_out_0_ready; // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_ready -> avalon_st_adapter:out_0_ready
  360. wire [0:0] avalon_st_adapter_out_0_error; // avalon_st_adapter:out_0_error -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_error
  361. wire nios2_debug_mem_slave_agent_rdata_fifo_src_valid; // nios2_debug_mem_slave_agent:rdata_fifo_src_valid -> avalon_st_adapter_001:in_0_valid
  362. wire [33:0] nios2_debug_mem_slave_agent_rdata_fifo_src_data; // nios2_debug_mem_slave_agent:rdata_fifo_src_data -> avalon_st_adapter_001:in_0_data
  363. wire nios2_debug_mem_slave_agent_rdata_fifo_src_ready; // avalon_st_adapter_001:in_0_ready -> nios2_debug_mem_slave_agent:rdata_fifo_src_ready
  364. wire avalon_st_adapter_001_out_0_valid; // avalon_st_adapter_001:out_0_valid -> nios2_debug_mem_slave_agent:rdata_fifo_sink_valid
  365. wire [33:0] avalon_st_adapter_001_out_0_data; // avalon_st_adapter_001:out_0_data -> nios2_debug_mem_slave_agent:rdata_fifo_sink_data
  366. wire avalon_st_adapter_001_out_0_ready; // nios2_debug_mem_slave_agent:rdata_fifo_sink_ready -> avalon_st_adapter_001:out_0_ready
  367. wire [0:0] avalon_st_adapter_001_out_0_error; // avalon_st_adapter_001:out_0_error -> nios2_debug_mem_slave_agent:rdata_fifo_sink_error
  368. wire onchip_memory2_s1_agent_rdata_fifo_src_valid; // onchip_memory2_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_002:in_0_valid
  369. wire [33:0] onchip_memory2_s1_agent_rdata_fifo_src_data; // onchip_memory2_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_002:in_0_data
  370. wire onchip_memory2_s1_agent_rdata_fifo_src_ready; // avalon_st_adapter_002:in_0_ready -> onchip_memory2_s1_agent:rdata_fifo_src_ready
  371. wire avalon_st_adapter_002_out_0_valid; // avalon_st_adapter_002:out_0_valid -> onchip_memory2_s1_agent:rdata_fifo_sink_valid
  372. wire [33:0] avalon_st_adapter_002_out_0_data; // avalon_st_adapter_002:out_0_data -> onchip_memory2_s1_agent:rdata_fifo_sink_data
  373. wire avalon_st_adapter_002_out_0_ready; // onchip_memory2_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_002:out_0_ready
  374. wire [0:0] avalon_st_adapter_002_out_0_error; // avalon_st_adapter_002:out_0_error -> onchip_memory2_s1_agent:rdata_fifo_sink_error
  375. wire pio_led_s1_agent_rdata_fifo_src_valid; // pio_LED_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_003:in_0_valid
  376. wire [33:0] pio_led_s1_agent_rdata_fifo_src_data; // pio_LED_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_003:in_0_data
  377. wire pio_led_s1_agent_rdata_fifo_src_ready; // avalon_st_adapter_003:in_0_ready -> pio_LED_s1_agent:rdata_fifo_src_ready
  378. wire avalon_st_adapter_003_out_0_valid; // avalon_st_adapter_003:out_0_valid -> pio_LED_s1_agent:rdata_fifo_sink_valid
  379. wire [33:0] avalon_st_adapter_003_out_0_data; // avalon_st_adapter_003:out_0_data -> pio_LED_s1_agent:rdata_fifo_sink_data
  380. wire avalon_st_adapter_003_out_0_ready; // pio_LED_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_003:out_0_ready
  381. wire [0:0] avalon_st_adapter_003_out_0_error; // avalon_st_adapter_003:out_0_error -> pio_LED_s1_agent:rdata_fifo_sink_error
  382. altera_merlin_master_translator #(
  383. .AV_ADDRESS_W (20),
  384. .AV_DATA_W (32),
  385. .AV_BURSTCOUNT_W (1),
  386. .AV_BYTEENABLE_W (4),
  387. .UAV_ADDRESS_W (20),
  388. .UAV_BURSTCOUNT_W (3),
  389. .USE_READ (1),
  390. .USE_WRITE (1),
  391. .USE_BEGINBURSTTRANSFER (0),
  392. .USE_BEGINTRANSFER (0),
  393. .USE_CHIPSELECT (0),
  394. .USE_BURSTCOUNT (0),
  395. .USE_READDATAVALID (0),
  396. .USE_WAITREQUEST (1),
  397. .USE_READRESPONSE (0),
  398. .USE_WRITERESPONSE (0),
  399. .AV_SYMBOLS_PER_WORD (4),
  400. .AV_ADDRESS_SYMBOLS (1),
  401. .AV_BURSTCOUNT_SYMBOLS (0),
  402. .AV_CONSTANT_BURST_BEHAVIOR (0),
  403. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  404. .AV_LINEWRAPBURSTS (0),
  405. .AV_REGISTERINCOMINGSIGNALS (1)
  406. ) nios2_data_master_translator (
  407. .clk (clk_50_clk_clk), // clk.clk
  408. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  409. .uav_address (nios2_data_master_translator_avalon_universal_master_0_address), // avalon_universal_master_0.address
  410. .uav_burstcount (nios2_data_master_translator_avalon_universal_master_0_burstcount), // .burstcount
  411. .uav_read (nios2_data_master_translator_avalon_universal_master_0_read), // .read
  412. .uav_write (nios2_data_master_translator_avalon_universal_master_0_write), // .write
  413. .uav_waitrequest (nios2_data_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest
  414. .uav_readdatavalid (nios2_data_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid
  415. .uav_byteenable (nios2_data_master_translator_avalon_universal_master_0_byteenable), // .byteenable
  416. .uav_readdata (nios2_data_master_translator_avalon_universal_master_0_readdata), // .readdata
  417. .uav_writedata (nios2_data_master_translator_avalon_universal_master_0_writedata), // .writedata
  418. .uav_lock (nios2_data_master_translator_avalon_universal_master_0_lock), // .lock
  419. .uav_debugaccess (nios2_data_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess
  420. .av_address (nios2_data_master_address), // avalon_anti_master_0.address
  421. .av_waitrequest (nios2_data_master_waitrequest), // .waitrequest
  422. .av_byteenable (nios2_data_master_byteenable), // .byteenable
  423. .av_read (nios2_data_master_read), // .read
  424. .av_readdata (nios2_data_master_readdata), // .readdata
  425. .av_write (nios2_data_master_write), // .write
  426. .av_writedata (nios2_data_master_writedata), // .writedata
  427. .av_debugaccess (nios2_data_master_debugaccess), // .debugaccess
  428. .av_burstcount (1'b1), // (terminated)
  429. .av_beginbursttransfer (1'b0), // (terminated)
  430. .av_begintransfer (1'b0), // (terminated)
  431. .av_chipselect (1'b0), // (terminated)
  432. .av_readdatavalid (), // (terminated)
  433. .av_lock (1'b0), // (terminated)
  434. .uav_clken (), // (terminated)
  435. .av_clken (1'b1), // (terminated)
  436. .uav_response (2'b00), // (terminated)
  437. .av_response (), // (terminated)
  438. .uav_writeresponsevalid (1'b0), // (terminated)
  439. .av_writeresponsevalid () // (terminated)
  440. );
  441. altera_merlin_master_translator #(
  442. .AV_ADDRESS_W (20),
  443. .AV_DATA_W (32),
  444. .AV_BURSTCOUNT_W (1),
  445. .AV_BYTEENABLE_W (4),
  446. .UAV_ADDRESS_W (20),
  447. .UAV_BURSTCOUNT_W (3),
  448. .USE_READ (1),
  449. .USE_WRITE (0),
  450. .USE_BEGINBURSTTRANSFER (0),
  451. .USE_BEGINTRANSFER (0),
  452. .USE_CHIPSELECT (0),
  453. .USE_BURSTCOUNT (0),
  454. .USE_READDATAVALID (0),
  455. .USE_WAITREQUEST (1),
  456. .USE_READRESPONSE (0),
  457. .USE_WRITERESPONSE (0),
  458. .AV_SYMBOLS_PER_WORD (4),
  459. .AV_ADDRESS_SYMBOLS (1),
  460. .AV_BURSTCOUNT_SYMBOLS (0),
  461. .AV_CONSTANT_BURST_BEHAVIOR (0),
  462. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  463. .AV_LINEWRAPBURSTS (1),
  464. .AV_REGISTERINCOMINGSIGNALS (0)
  465. ) nios2_instruction_master_translator (
  466. .clk (clk_50_clk_clk), // clk.clk
  467. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  468. .uav_address (nios2_instruction_master_translator_avalon_universal_master_0_address), // avalon_universal_master_0.address
  469. .uav_burstcount (nios2_instruction_master_translator_avalon_universal_master_0_burstcount), // .burstcount
  470. .uav_read (nios2_instruction_master_translator_avalon_universal_master_0_read), // .read
  471. .uav_write (nios2_instruction_master_translator_avalon_universal_master_0_write), // .write
  472. .uav_waitrequest (nios2_instruction_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest
  473. .uav_readdatavalid (nios2_instruction_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid
  474. .uav_byteenable (nios2_instruction_master_translator_avalon_universal_master_0_byteenable), // .byteenable
  475. .uav_readdata (nios2_instruction_master_translator_avalon_universal_master_0_readdata), // .readdata
  476. .uav_writedata (nios2_instruction_master_translator_avalon_universal_master_0_writedata), // .writedata
  477. .uav_lock (nios2_instruction_master_translator_avalon_universal_master_0_lock), // .lock
  478. .uav_debugaccess (nios2_instruction_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess
  479. .av_address (nios2_instruction_master_address), // avalon_anti_master_0.address
  480. .av_waitrequest (nios2_instruction_master_waitrequest), // .waitrequest
  481. .av_read (nios2_instruction_master_read), // .read
  482. .av_readdata (nios2_instruction_master_readdata), // .readdata
  483. .av_burstcount (1'b1), // (terminated)
  484. .av_byteenable (4'b1111), // (terminated)
  485. .av_beginbursttransfer (1'b0), // (terminated)
  486. .av_begintransfer (1'b0), // (terminated)
  487. .av_chipselect (1'b0), // (terminated)
  488. .av_readdatavalid (), // (terminated)
  489. .av_write (1'b0), // (terminated)
  490. .av_writedata (32'b00000000000000000000000000000000), // (terminated)
  491. .av_lock (1'b0), // (terminated)
  492. .av_debugaccess (1'b0), // (terminated)
  493. .uav_clken (), // (terminated)
  494. .av_clken (1'b1), // (terminated)
  495. .uav_response (2'b00), // (terminated)
  496. .av_response (), // (terminated)
  497. .uav_writeresponsevalid (1'b0), // (terminated)
  498. .av_writeresponsevalid () // (terminated)
  499. );
  500. altera_merlin_slave_translator #(
  501. .AV_ADDRESS_W (1),
  502. .AV_DATA_W (32),
  503. .UAV_DATA_W (32),
  504. .AV_BURSTCOUNT_W (1),
  505. .AV_BYTEENABLE_W (1),
  506. .UAV_BYTEENABLE_W (4),
  507. .UAV_ADDRESS_W (20),
  508. .UAV_BURSTCOUNT_W (3),
  509. .AV_READLATENCY (0),
  510. .USE_READDATAVALID (0),
  511. .USE_WAITREQUEST (1),
  512. .USE_UAV_CLKEN (0),
  513. .USE_READRESPONSE (0),
  514. .USE_WRITERESPONSE (0),
  515. .AV_SYMBOLS_PER_WORD (4),
  516. .AV_ADDRESS_SYMBOLS (0),
  517. .AV_BURSTCOUNT_SYMBOLS (0),
  518. .AV_CONSTANT_BURST_BEHAVIOR (0),
  519. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  520. .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
  521. .CHIPSELECT_THROUGH_READLATENCY (0),
  522. .AV_READ_WAIT_CYCLES (1),
  523. .AV_WRITE_WAIT_CYCLES (0),
  524. .AV_SETUP_WAIT_CYCLES (0),
  525. .AV_DATA_HOLD_CYCLES (0)
  526. ) jtag_uart_avalon_jtag_slave_translator (
  527. .clk (clk_50_clk_clk), // clk.clk
  528. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  529. .uav_address (jtag_uart_avalon_jtag_slave_agent_m0_address), // avalon_universal_slave_0.address
  530. .uav_burstcount (jtag_uart_avalon_jtag_slave_agent_m0_burstcount), // .burstcount
  531. .uav_read (jtag_uart_avalon_jtag_slave_agent_m0_read), // .read
  532. .uav_write (jtag_uart_avalon_jtag_slave_agent_m0_write), // .write
  533. .uav_waitrequest (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest), // .waitrequest
  534. .uav_readdatavalid (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid), // .readdatavalid
  535. .uav_byteenable (jtag_uart_avalon_jtag_slave_agent_m0_byteenable), // .byteenable
  536. .uav_readdata (jtag_uart_avalon_jtag_slave_agent_m0_readdata), // .readdata
  537. .uav_writedata (jtag_uart_avalon_jtag_slave_agent_m0_writedata), // .writedata
  538. .uav_lock (jtag_uart_avalon_jtag_slave_agent_m0_lock), // .lock
  539. .uav_debugaccess (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess), // .debugaccess
  540. .av_address (jtag_uart_avalon_jtag_slave_address), // avalon_anti_slave_0.address
  541. .av_write (jtag_uart_avalon_jtag_slave_write), // .write
  542. .av_read (jtag_uart_avalon_jtag_slave_read), // .read
  543. .av_readdata (jtag_uart_avalon_jtag_slave_readdata), // .readdata
  544. .av_writedata (jtag_uart_avalon_jtag_slave_writedata), // .writedata
  545. .av_waitrequest (jtag_uart_avalon_jtag_slave_waitrequest), // .waitrequest
  546. .av_chipselect (jtag_uart_avalon_jtag_slave_chipselect), // .chipselect
  547. .av_begintransfer (), // (terminated)
  548. .av_beginbursttransfer (), // (terminated)
  549. .av_burstcount (), // (terminated)
  550. .av_byteenable (), // (terminated)
  551. .av_readdatavalid (1'b0), // (terminated)
  552. .av_writebyteenable (), // (terminated)
  553. .av_lock (), // (terminated)
  554. .av_clken (), // (terminated)
  555. .uav_clken (1'b0), // (terminated)
  556. .av_debugaccess (), // (terminated)
  557. .av_outputenable (), // (terminated)
  558. .uav_response (), // (terminated)
  559. .av_response (2'b00), // (terminated)
  560. .uav_writeresponsevalid (), // (terminated)
  561. .av_writeresponsevalid (1'b0) // (terminated)
  562. );
  563. altera_merlin_slave_translator #(
  564. .AV_ADDRESS_W (9),
  565. .AV_DATA_W (32),
  566. .UAV_DATA_W (32),
  567. .AV_BURSTCOUNT_W (1),
  568. .AV_BYTEENABLE_W (4),
  569. .UAV_BYTEENABLE_W (4),
  570. .UAV_ADDRESS_W (20),
  571. .UAV_BURSTCOUNT_W (3),
  572. .AV_READLATENCY (0),
  573. .USE_READDATAVALID (0),
  574. .USE_WAITREQUEST (1),
  575. .USE_UAV_CLKEN (0),
  576. .USE_READRESPONSE (0),
  577. .USE_WRITERESPONSE (0),
  578. .AV_SYMBOLS_PER_WORD (4),
  579. .AV_ADDRESS_SYMBOLS (0),
  580. .AV_BURSTCOUNT_SYMBOLS (0),
  581. .AV_CONSTANT_BURST_BEHAVIOR (0),
  582. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  583. .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
  584. .CHIPSELECT_THROUGH_READLATENCY (0),
  585. .AV_READ_WAIT_CYCLES (1),
  586. .AV_WRITE_WAIT_CYCLES (0),
  587. .AV_SETUP_WAIT_CYCLES (0),
  588. .AV_DATA_HOLD_CYCLES (0)
  589. ) nios2_debug_mem_slave_translator (
  590. .clk (clk_50_clk_clk), // clk.clk
  591. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  592. .uav_address (nios2_debug_mem_slave_agent_m0_address), // avalon_universal_slave_0.address
  593. .uav_burstcount (nios2_debug_mem_slave_agent_m0_burstcount), // .burstcount
  594. .uav_read (nios2_debug_mem_slave_agent_m0_read), // .read
  595. .uav_write (nios2_debug_mem_slave_agent_m0_write), // .write
  596. .uav_waitrequest (nios2_debug_mem_slave_agent_m0_waitrequest), // .waitrequest
  597. .uav_readdatavalid (nios2_debug_mem_slave_agent_m0_readdatavalid), // .readdatavalid
  598. .uav_byteenable (nios2_debug_mem_slave_agent_m0_byteenable), // .byteenable
  599. .uav_readdata (nios2_debug_mem_slave_agent_m0_readdata), // .readdata
  600. .uav_writedata (nios2_debug_mem_slave_agent_m0_writedata), // .writedata
  601. .uav_lock (nios2_debug_mem_slave_agent_m0_lock), // .lock
  602. .uav_debugaccess (nios2_debug_mem_slave_agent_m0_debugaccess), // .debugaccess
  603. .av_address (nios2_debug_mem_slave_address), // avalon_anti_slave_0.address
  604. .av_write (nios2_debug_mem_slave_write), // .write
  605. .av_read (nios2_debug_mem_slave_read), // .read
  606. .av_readdata (nios2_debug_mem_slave_readdata), // .readdata
  607. .av_writedata (nios2_debug_mem_slave_writedata), // .writedata
  608. .av_byteenable (nios2_debug_mem_slave_byteenable), // .byteenable
  609. .av_waitrequest (nios2_debug_mem_slave_waitrequest), // .waitrequest
  610. .av_debugaccess (nios2_debug_mem_slave_debugaccess), // .debugaccess
  611. .av_begintransfer (), // (terminated)
  612. .av_beginbursttransfer (), // (terminated)
  613. .av_burstcount (), // (terminated)
  614. .av_readdatavalid (1'b0), // (terminated)
  615. .av_writebyteenable (), // (terminated)
  616. .av_lock (), // (terminated)
  617. .av_chipselect (), // (terminated)
  618. .av_clken (), // (terminated)
  619. .uav_clken (1'b0), // (terminated)
  620. .av_outputenable (), // (terminated)
  621. .uav_response (), // (terminated)
  622. .av_response (2'b00), // (terminated)
  623. .uav_writeresponsevalid (), // (terminated)
  624. .av_writeresponsevalid (1'b0) // (terminated)
  625. );
  626. altera_merlin_slave_translator #(
  627. .AV_ADDRESS_W (16),
  628. .AV_DATA_W (32),
  629. .UAV_DATA_W (32),
  630. .AV_BURSTCOUNT_W (1),
  631. .AV_BYTEENABLE_W (4),
  632. .UAV_BYTEENABLE_W (4),
  633. .UAV_ADDRESS_W (20),
  634. .UAV_BURSTCOUNT_W (3),
  635. .AV_READLATENCY (1),
  636. .USE_READDATAVALID (0),
  637. .USE_WAITREQUEST (0),
  638. .USE_UAV_CLKEN (0),
  639. .USE_READRESPONSE (0),
  640. .USE_WRITERESPONSE (0),
  641. .AV_SYMBOLS_PER_WORD (4),
  642. .AV_ADDRESS_SYMBOLS (0),
  643. .AV_BURSTCOUNT_SYMBOLS (0),
  644. .AV_CONSTANT_BURST_BEHAVIOR (0),
  645. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  646. .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
  647. .CHIPSELECT_THROUGH_READLATENCY (0),
  648. .AV_READ_WAIT_CYCLES (0),
  649. .AV_WRITE_WAIT_CYCLES (0),
  650. .AV_SETUP_WAIT_CYCLES (0),
  651. .AV_DATA_HOLD_CYCLES (0)
  652. ) onchip_memory2_s1_translator (
  653. .clk (clk_50_clk_clk), // clk.clk
  654. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  655. .uav_address (onchip_memory2_s1_agent_m0_address), // avalon_universal_slave_0.address
  656. .uav_burstcount (onchip_memory2_s1_agent_m0_burstcount), // .burstcount
  657. .uav_read (onchip_memory2_s1_agent_m0_read), // .read
  658. .uav_write (onchip_memory2_s1_agent_m0_write), // .write
  659. .uav_waitrequest (onchip_memory2_s1_agent_m0_waitrequest), // .waitrequest
  660. .uav_readdatavalid (onchip_memory2_s1_agent_m0_readdatavalid), // .readdatavalid
  661. .uav_byteenable (onchip_memory2_s1_agent_m0_byteenable), // .byteenable
  662. .uav_readdata (onchip_memory2_s1_agent_m0_readdata), // .readdata
  663. .uav_writedata (onchip_memory2_s1_agent_m0_writedata), // .writedata
  664. .uav_lock (onchip_memory2_s1_agent_m0_lock), // .lock
  665. .uav_debugaccess (onchip_memory2_s1_agent_m0_debugaccess), // .debugaccess
  666. .av_address (onchip_memory2_s1_address), // avalon_anti_slave_0.address
  667. .av_write (onchip_memory2_s1_write), // .write
  668. .av_readdata (onchip_memory2_s1_readdata), // .readdata
  669. .av_writedata (onchip_memory2_s1_writedata), // .writedata
  670. .av_byteenable (onchip_memory2_s1_byteenable), // .byteenable
  671. .av_chipselect (onchip_memory2_s1_chipselect), // .chipselect
  672. .av_clken (onchip_memory2_s1_clken), // .clken
  673. .av_read (), // (terminated)
  674. .av_begintransfer (), // (terminated)
  675. .av_beginbursttransfer (), // (terminated)
  676. .av_burstcount (), // (terminated)
  677. .av_readdatavalid (1'b0), // (terminated)
  678. .av_waitrequest (1'b0), // (terminated)
  679. .av_writebyteenable (), // (terminated)
  680. .av_lock (), // (terminated)
  681. .uav_clken (1'b0), // (terminated)
  682. .av_debugaccess (), // (terminated)
  683. .av_outputenable (), // (terminated)
  684. .uav_response (), // (terminated)
  685. .av_response (2'b00), // (terminated)
  686. .uav_writeresponsevalid (), // (terminated)
  687. .av_writeresponsevalid (1'b0) // (terminated)
  688. );
  689. altera_merlin_slave_translator #(
  690. .AV_ADDRESS_W (2),
  691. .AV_DATA_W (32),
  692. .UAV_DATA_W (32),
  693. .AV_BURSTCOUNT_W (1),
  694. .AV_BYTEENABLE_W (1),
  695. .UAV_BYTEENABLE_W (4),
  696. .UAV_ADDRESS_W (20),
  697. .UAV_BURSTCOUNT_W (3),
  698. .AV_READLATENCY (0),
  699. .USE_READDATAVALID (0),
  700. .USE_WAITREQUEST (0),
  701. .USE_UAV_CLKEN (0),
  702. .USE_READRESPONSE (0),
  703. .USE_WRITERESPONSE (0),
  704. .AV_SYMBOLS_PER_WORD (4),
  705. .AV_ADDRESS_SYMBOLS (0),
  706. .AV_BURSTCOUNT_SYMBOLS (0),
  707. .AV_CONSTANT_BURST_BEHAVIOR (0),
  708. .UAV_CONSTANT_BURST_BEHAVIOR (0),
  709. .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
  710. .CHIPSELECT_THROUGH_READLATENCY (0),
  711. .AV_READ_WAIT_CYCLES (1),
  712. .AV_WRITE_WAIT_CYCLES (0),
  713. .AV_SETUP_WAIT_CYCLES (0),
  714. .AV_DATA_HOLD_CYCLES (0)
  715. ) pio_led_s1_translator (
  716. .clk (clk_50_clk_clk), // clk.clk
  717. .reset (nios2_reset_reset_bridge_in_reset_reset), // reset.reset
  718. .uav_address (pio_led_s1_agent_m0_address), // avalon_universal_slave_0.address
  719. .uav_burstcount (pio_led_s1_agent_m0_burstcount), // .burstcount
  720. .uav_read (pio_led_s1_agent_m0_read), // .read
  721. .uav_write (pio_led_s1_agent_m0_write), // .write
  722. .uav_waitrequest (pio_led_s1_agent_m0_waitrequest), // .waitrequest
  723. .uav_readdatavalid (pio_led_s1_agent_m0_readdatavalid), // .readdatavalid
  724. .uav_byteenable (pio_led_s1_agent_m0_byteenable), // .byteenable
  725. .uav_readdata (pio_led_s1_agent_m0_readdata), // .readdata
  726. .uav_writedata (pio_led_s1_agent_m0_writedata), // .writedata
  727. .uav_lock (pio_led_s1_agent_m0_lock), // .lock
  728. .uav_debugaccess (pio_led_s1_agent_m0_debugaccess), // .debugaccess
  729. .av_address (pio_LED_s1_address), // avalon_anti_slave_0.address
  730. .av_write (pio_LED_s1_write), // .write
  731. .av_readdata (pio_LED_s1_readdata), // .readdata
  732. .av_writedata (pio_LED_s1_writedata), // .writedata
  733. .av_chipselect (pio_LED_s1_chipselect), // .chipselect
  734. .av_read (), // (terminated)
  735. .av_begintransfer (), // (terminated)
  736. .av_beginbursttransfer (), // (terminated)
  737. .av_burstcount (), // (terminated)
  738. .av_byteenable (), // (terminated)
  739. .av_readdatavalid (1'b0), // (terminated)
  740. .av_waitrequest (1'b0), // (terminated)
  741. .av_writebyteenable (), // (terminated)
  742. .av_lock (), // (terminated)
  743. .av_clken (), // (terminated)
  744. .uav_clken (1'b0), // (terminated)
  745. .av_debugaccess (), // (terminated)
  746. .av_outputenable (), // (terminated)
  747. .uav_response (), // (terminated)
  748. .av_response (2'b00), // (terminated)
  749. .uav_writeresponsevalid (), // (terminated)
  750. .av_writeresponsevalid (1'b0) // (terminated)
  751. );
  752. altera_merlin_master_agent #(
  753. .PKT_ORI_BURST_SIZE_H (93),
  754. .PKT_ORI_BURST_SIZE_L (91),
  755. .PKT_RESPONSE_STATUS_H (90),
  756. .PKT_RESPONSE_STATUS_L (89),
  757. .PKT_QOS_H (76),
  758. .PKT_QOS_L (76),
  759. .PKT_DATA_SIDEBAND_H (74),
  760. .PKT_DATA_SIDEBAND_L (74),
  761. .PKT_ADDR_SIDEBAND_H (73),
  762. .PKT_ADDR_SIDEBAND_L (73),
  763. .PKT_BURST_TYPE_H (72),
  764. .PKT_BURST_TYPE_L (71),
  765. .PKT_CACHE_H (88),
  766. .PKT_CACHE_L (85),
  767. .PKT_THREAD_ID_H (81),
  768. .PKT_THREAD_ID_L (81),
  769. .PKT_BURST_SIZE_H (70),
  770. .PKT_BURST_SIZE_L (68),
  771. .PKT_TRANS_EXCLUSIVE (61),
  772. .PKT_TRANS_LOCK (60),
  773. .PKT_BEGIN_BURST (75),
  774. .PKT_PROTECTION_H (84),
  775. .PKT_PROTECTION_L (82),
  776. .PKT_BURSTWRAP_H (67),
  777. .PKT_BURSTWRAP_L (65),
  778. .PKT_BYTE_CNT_H (64),
  779. .PKT_BYTE_CNT_L (62),
  780. .PKT_ADDR_H (55),
  781. .PKT_ADDR_L (36),
  782. .PKT_TRANS_COMPRESSED_READ (56),
  783. .PKT_TRANS_POSTED (57),
  784. .PKT_TRANS_WRITE (58),
  785. .PKT_TRANS_READ (59),
  786. .PKT_DATA_H (31),
  787. .PKT_DATA_L (0),
  788. .PKT_BYTEEN_H (35),
  789. .PKT_BYTEEN_L (32),
  790. .PKT_SRC_ID_H (78),
  791. .PKT_SRC_ID_L (77),
  792. .PKT_DEST_ID_H (80),
  793. .PKT_DEST_ID_L (79),
  794. .ST_DATA_W (94),
  795. .ST_CHANNEL_W (4),
  796. .AV_BURSTCOUNT_W (3),
  797. .SUPPRESS_0_BYTEEN_RSP (0),
  798. .ID (0),
  799. .BURSTWRAP_VALUE (7),
  800. .CACHE_VALUE (0),
  801. .SECURE_ACCESS_BIT (1),
  802. .USE_READRESPONSE (0),
  803. .USE_WRITERESPONSE (0)
  804. ) nios2_data_master_agent (
  805. .clk (clk_50_clk_clk), // clk.clk
  806. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  807. .av_address (nios2_data_master_translator_avalon_universal_master_0_address), // av.address
  808. .av_write (nios2_data_master_translator_avalon_universal_master_0_write), // .write
  809. .av_read (nios2_data_master_translator_avalon_universal_master_0_read), // .read
  810. .av_writedata (nios2_data_master_translator_avalon_universal_master_0_writedata), // .writedata
  811. .av_readdata (nios2_data_master_translator_avalon_universal_master_0_readdata), // .readdata
  812. .av_waitrequest (nios2_data_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest
  813. .av_readdatavalid (nios2_data_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid
  814. .av_byteenable (nios2_data_master_translator_avalon_universal_master_0_byteenable), // .byteenable
  815. .av_burstcount (nios2_data_master_translator_avalon_universal_master_0_burstcount), // .burstcount
  816. .av_debugaccess (nios2_data_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess
  817. .av_lock (nios2_data_master_translator_avalon_universal_master_0_lock), // .lock
  818. .cp_valid (nios2_data_master_agent_cp_valid), // cp.valid
  819. .cp_data (nios2_data_master_agent_cp_data), // .data
  820. .cp_startofpacket (nios2_data_master_agent_cp_startofpacket), // .startofpacket
  821. .cp_endofpacket (nios2_data_master_agent_cp_endofpacket), // .endofpacket
  822. .cp_ready (nios2_data_master_agent_cp_ready), // .ready
  823. .rp_valid (rsp_mux_src_valid), // rp.valid
  824. .rp_data (rsp_mux_src_data), // .data
  825. .rp_channel (rsp_mux_src_channel), // .channel
  826. .rp_startofpacket (rsp_mux_src_startofpacket), // .startofpacket
  827. .rp_endofpacket (rsp_mux_src_endofpacket), // .endofpacket
  828. .rp_ready (rsp_mux_src_ready), // .ready
  829. .av_response (), // (terminated)
  830. .av_writeresponsevalid () // (terminated)
  831. );
  832. altera_merlin_master_agent #(
  833. .PKT_ORI_BURST_SIZE_H (93),
  834. .PKT_ORI_BURST_SIZE_L (91),
  835. .PKT_RESPONSE_STATUS_H (90),
  836. .PKT_RESPONSE_STATUS_L (89),
  837. .PKT_QOS_H (76),
  838. .PKT_QOS_L (76),
  839. .PKT_DATA_SIDEBAND_H (74),
  840. .PKT_DATA_SIDEBAND_L (74),
  841. .PKT_ADDR_SIDEBAND_H (73),
  842. .PKT_ADDR_SIDEBAND_L (73),
  843. .PKT_BURST_TYPE_H (72),
  844. .PKT_BURST_TYPE_L (71),
  845. .PKT_CACHE_H (88),
  846. .PKT_CACHE_L (85),
  847. .PKT_THREAD_ID_H (81),
  848. .PKT_THREAD_ID_L (81),
  849. .PKT_BURST_SIZE_H (70),
  850. .PKT_BURST_SIZE_L (68),
  851. .PKT_TRANS_EXCLUSIVE (61),
  852. .PKT_TRANS_LOCK (60),
  853. .PKT_BEGIN_BURST (75),
  854. .PKT_PROTECTION_H (84),
  855. .PKT_PROTECTION_L (82),
  856. .PKT_BURSTWRAP_H (67),
  857. .PKT_BURSTWRAP_L (65),
  858. .PKT_BYTE_CNT_H (64),
  859. .PKT_BYTE_CNT_L (62),
  860. .PKT_ADDR_H (55),
  861. .PKT_ADDR_L (36),
  862. .PKT_TRANS_COMPRESSED_READ (56),
  863. .PKT_TRANS_POSTED (57),
  864. .PKT_TRANS_WRITE (58),
  865. .PKT_TRANS_READ (59),
  866. .PKT_DATA_H (31),
  867. .PKT_DATA_L (0),
  868. .PKT_BYTEEN_H (35),
  869. .PKT_BYTEEN_L (32),
  870. .PKT_SRC_ID_H (78),
  871. .PKT_SRC_ID_L (77),
  872. .PKT_DEST_ID_H (80),
  873. .PKT_DEST_ID_L (79),
  874. .ST_DATA_W (94),
  875. .ST_CHANNEL_W (4),
  876. .AV_BURSTCOUNT_W (3),
  877. .SUPPRESS_0_BYTEEN_RSP (0),
  878. .ID (1),
  879. .BURSTWRAP_VALUE (3),
  880. .CACHE_VALUE (0),
  881. .SECURE_ACCESS_BIT (1),
  882. .USE_READRESPONSE (0),
  883. .USE_WRITERESPONSE (0)
  884. ) nios2_instruction_master_agent (
  885. .clk (clk_50_clk_clk), // clk.clk
  886. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  887. .av_address (nios2_instruction_master_translator_avalon_universal_master_0_address), // av.address
  888. .av_write (nios2_instruction_master_translator_avalon_universal_master_0_write), // .write
  889. .av_read (nios2_instruction_master_translator_avalon_universal_master_0_read), // .read
  890. .av_writedata (nios2_instruction_master_translator_avalon_universal_master_0_writedata), // .writedata
  891. .av_readdata (nios2_instruction_master_translator_avalon_universal_master_0_readdata), // .readdata
  892. .av_waitrequest (nios2_instruction_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest
  893. .av_readdatavalid (nios2_instruction_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid
  894. .av_byteenable (nios2_instruction_master_translator_avalon_universal_master_0_byteenable), // .byteenable
  895. .av_burstcount (nios2_instruction_master_translator_avalon_universal_master_0_burstcount), // .burstcount
  896. .av_debugaccess (nios2_instruction_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess
  897. .av_lock (nios2_instruction_master_translator_avalon_universal_master_0_lock), // .lock
  898. .cp_valid (nios2_instruction_master_agent_cp_valid), // cp.valid
  899. .cp_data (nios2_instruction_master_agent_cp_data), // .data
  900. .cp_startofpacket (nios2_instruction_master_agent_cp_startofpacket), // .startofpacket
  901. .cp_endofpacket (nios2_instruction_master_agent_cp_endofpacket), // .endofpacket
  902. .cp_ready (nios2_instruction_master_agent_cp_ready), // .ready
  903. .rp_valid (rsp_mux_001_src_valid), // rp.valid
  904. .rp_data (rsp_mux_001_src_data), // .data
  905. .rp_channel (rsp_mux_001_src_channel), // .channel
  906. .rp_startofpacket (rsp_mux_001_src_startofpacket), // .startofpacket
  907. .rp_endofpacket (rsp_mux_001_src_endofpacket), // .endofpacket
  908. .rp_ready (rsp_mux_001_src_ready), // .ready
  909. .av_response (), // (terminated)
  910. .av_writeresponsevalid () // (terminated)
  911. );
  912. altera_merlin_slave_agent #(
  913. .PKT_ORI_BURST_SIZE_H (93),
  914. .PKT_ORI_BURST_SIZE_L (91),
  915. .PKT_RESPONSE_STATUS_H (90),
  916. .PKT_RESPONSE_STATUS_L (89),
  917. .PKT_BURST_SIZE_H (70),
  918. .PKT_BURST_SIZE_L (68),
  919. .PKT_TRANS_LOCK (60),
  920. .PKT_BEGIN_BURST (75),
  921. .PKT_PROTECTION_H (84),
  922. .PKT_PROTECTION_L (82),
  923. .PKT_BURSTWRAP_H (67),
  924. .PKT_BURSTWRAP_L (65),
  925. .PKT_BYTE_CNT_H (64),
  926. .PKT_BYTE_CNT_L (62),
  927. .PKT_ADDR_H (55),
  928. .PKT_ADDR_L (36),
  929. .PKT_TRANS_COMPRESSED_READ (56),
  930. .PKT_TRANS_POSTED (57),
  931. .PKT_TRANS_WRITE (58),
  932. .PKT_TRANS_READ (59),
  933. .PKT_DATA_H (31),
  934. .PKT_DATA_L (0),
  935. .PKT_BYTEEN_H (35),
  936. .PKT_BYTEEN_L (32),
  937. .PKT_SRC_ID_H (78),
  938. .PKT_SRC_ID_L (77),
  939. .PKT_DEST_ID_H (80),
  940. .PKT_DEST_ID_L (79),
  941. .PKT_SYMBOL_W (8),
  942. .ST_CHANNEL_W (4),
  943. .ST_DATA_W (94),
  944. .AVS_BURSTCOUNT_W (3),
  945. .SUPPRESS_0_BYTEEN_CMD (0),
  946. .PREVENT_FIFO_OVERFLOW (1),
  947. .USE_READRESPONSE (0),
  948. .USE_WRITERESPONSE (0),
  949. .ECC_ENABLE (0)
  950. ) jtag_uart_avalon_jtag_slave_agent (
  951. .clk (clk_50_clk_clk), // clk.clk
  952. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  953. .m0_address (jtag_uart_avalon_jtag_slave_agent_m0_address), // m0.address
  954. .m0_burstcount (jtag_uart_avalon_jtag_slave_agent_m0_burstcount), // .burstcount
  955. .m0_byteenable (jtag_uart_avalon_jtag_slave_agent_m0_byteenable), // .byteenable
  956. .m0_debugaccess (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess), // .debugaccess
  957. .m0_lock (jtag_uart_avalon_jtag_slave_agent_m0_lock), // .lock
  958. .m0_readdata (jtag_uart_avalon_jtag_slave_agent_m0_readdata), // .readdata
  959. .m0_readdatavalid (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid), // .readdatavalid
  960. .m0_read (jtag_uart_avalon_jtag_slave_agent_m0_read), // .read
  961. .m0_waitrequest (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest), // .waitrequest
  962. .m0_writedata (jtag_uart_avalon_jtag_slave_agent_m0_writedata), // .writedata
  963. .m0_write (jtag_uart_avalon_jtag_slave_agent_m0_write), // .write
  964. .rp_endofpacket (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket), // rp.endofpacket
  965. .rp_ready (jtag_uart_avalon_jtag_slave_agent_rp_ready), // .ready
  966. .rp_valid (jtag_uart_avalon_jtag_slave_agent_rp_valid), // .valid
  967. .rp_data (jtag_uart_avalon_jtag_slave_agent_rp_data), // .data
  968. .rp_startofpacket (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket), // .startofpacket
  969. .cp_ready (cmd_mux_src_ready), // cp.ready
  970. .cp_valid (cmd_mux_src_valid), // .valid
  971. .cp_data (cmd_mux_src_data), // .data
  972. .cp_startofpacket (cmd_mux_src_startofpacket), // .startofpacket
  973. .cp_endofpacket (cmd_mux_src_endofpacket), // .endofpacket
  974. .cp_channel (cmd_mux_src_channel), // .channel
  975. .rf_sink_ready (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready), // rf_sink.ready
  976. .rf_sink_valid (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid), // .valid
  977. .rf_sink_startofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket
  978. .rf_sink_endofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket
  979. .rf_sink_data (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data), // .data
  980. .rf_source_ready (jtag_uart_avalon_jtag_slave_agent_rf_source_ready), // rf_source.ready
  981. .rf_source_valid (jtag_uart_avalon_jtag_slave_agent_rf_source_valid), // .valid
  982. .rf_source_startofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket), // .startofpacket
  983. .rf_source_endofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket), // .endofpacket
  984. .rf_source_data (jtag_uart_avalon_jtag_slave_agent_rf_source_data), // .data
  985. .rdata_fifo_sink_ready (avalon_st_adapter_out_0_ready), // rdata_fifo_sink.ready
  986. .rdata_fifo_sink_valid (avalon_st_adapter_out_0_valid), // .valid
  987. .rdata_fifo_sink_data (avalon_st_adapter_out_0_data), // .data
  988. .rdata_fifo_sink_error (avalon_st_adapter_out_0_error), // .error
  989. .rdata_fifo_src_ready (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready
  990. .rdata_fifo_src_valid (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid), // .valid
  991. .rdata_fifo_src_data (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data), // .data
  992. .m0_response (2'b00), // (terminated)
  993. .m0_writeresponsevalid (1'b0) // (terminated)
  994. );
  995. altera_avalon_sc_fifo #(
  996. .SYMBOLS_PER_BEAT (1),
  997. .BITS_PER_SYMBOL (95),
  998. .FIFO_DEPTH (2),
  999. .CHANNEL_WIDTH (0),
  1000. .ERROR_WIDTH (0),
  1001. .USE_PACKETS (1),
  1002. .USE_FILL_LEVEL (0),
  1003. .EMPTY_LATENCY (1),
  1004. .USE_MEMORY_BLOCKS (0),
  1005. .USE_STORE_FORWARD (0),
  1006. .USE_ALMOST_FULL_IF (0),
  1007. .USE_ALMOST_EMPTY_IF (0)
  1008. ) jtag_uart_avalon_jtag_slave_agent_rsp_fifo (
  1009. .clk (clk_50_clk_clk), // clk.clk
  1010. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1011. .in_data (jtag_uart_avalon_jtag_slave_agent_rf_source_data), // in.data
  1012. .in_valid (jtag_uart_avalon_jtag_slave_agent_rf_source_valid), // .valid
  1013. .in_ready (jtag_uart_avalon_jtag_slave_agent_rf_source_ready), // .ready
  1014. .in_startofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket), // .startofpacket
  1015. .in_endofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket), // .endofpacket
  1016. .out_data (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data), // out.data
  1017. .out_valid (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid), // .valid
  1018. .out_ready (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready), // .ready
  1019. .out_startofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1020. .out_endofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1021. .csr_address (2'b00), // (terminated)
  1022. .csr_read (1'b0), // (terminated)
  1023. .csr_write (1'b0), // (terminated)
  1024. .csr_readdata (), // (terminated)
  1025. .csr_writedata (32'b00000000000000000000000000000000), // (terminated)
  1026. .almost_full_data (), // (terminated)
  1027. .almost_empty_data (), // (terminated)
  1028. .in_empty (1'b0), // (terminated)
  1029. .out_empty (), // (terminated)
  1030. .in_error (1'b0), // (terminated)
  1031. .out_error (), // (terminated)
  1032. .in_channel (1'b0), // (terminated)
  1033. .out_channel () // (terminated)
  1034. );
  1035. altera_merlin_slave_agent #(
  1036. .PKT_ORI_BURST_SIZE_H (93),
  1037. .PKT_ORI_BURST_SIZE_L (91),
  1038. .PKT_RESPONSE_STATUS_H (90),
  1039. .PKT_RESPONSE_STATUS_L (89),
  1040. .PKT_BURST_SIZE_H (70),
  1041. .PKT_BURST_SIZE_L (68),
  1042. .PKT_TRANS_LOCK (60),
  1043. .PKT_BEGIN_BURST (75),
  1044. .PKT_PROTECTION_H (84),
  1045. .PKT_PROTECTION_L (82),
  1046. .PKT_BURSTWRAP_H (67),
  1047. .PKT_BURSTWRAP_L (65),
  1048. .PKT_BYTE_CNT_H (64),
  1049. .PKT_BYTE_CNT_L (62),
  1050. .PKT_ADDR_H (55),
  1051. .PKT_ADDR_L (36),
  1052. .PKT_TRANS_COMPRESSED_READ (56),
  1053. .PKT_TRANS_POSTED (57),
  1054. .PKT_TRANS_WRITE (58),
  1055. .PKT_TRANS_READ (59),
  1056. .PKT_DATA_H (31),
  1057. .PKT_DATA_L (0),
  1058. .PKT_BYTEEN_H (35),
  1059. .PKT_BYTEEN_L (32),
  1060. .PKT_SRC_ID_H (78),
  1061. .PKT_SRC_ID_L (77),
  1062. .PKT_DEST_ID_H (80),
  1063. .PKT_DEST_ID_L (79),
  1064. .PKT_SYMBOL_W (8),
  1065. .ST_CHANNEL_W (4),
  1066. .ST_DATA_W (94),
  1067. .AVS_BURSTCOUNT_W (3),
  1068. .SUPPRESS_0_BYTEEN_CMD (0),
  1069. .PREVENT_FIFO_OVERFLOW (1),
  1070. .USE_READRESPONSE (0),
  1071. .USE_WRITERESPONSE (0),
  1072. .ECC_ENABLE (0)
  1073. ) nios2_debug_mem_slave_agent (
  1074. .clk (clk_50_clk_clk), // clk.clk
  1075. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1076. .m0_address (nios2_debug_mem_slave_agent_m0_address), // m0.address
  1077. .m0_burstcount (nios2_debug_mem_slave_agent_m0_burstcount), // .burstcount
  1078. .m0_byteenable (nios2_debug_mem_slave_agent_m0_byteenable), // .byteenable
  1079. .m0_debugaccess (nios2_debug_mem_slave_agent_m0_debugaccess), // .debugaccess
  1080. .m0_lock (nios2_debug_mem_slave_agent_m0_lock), // .lock
  1081. .m0_readdata (nios2_debug_mem_slave_agent_m0_readdata), // .readdata
  1082. .m0_readdatavalid (nios2_debug_mem_slave_agent_m0_readdatavalid), // .readdatavalid
  1083. .m0_read (nios2_debug_mem_slave_agent_m0_read), // .read
  1084. .m0_waitrequest (nios2_debug_mem_slave_agent_m0_waitrequest), // .waitrequest
  1085. .m0_writedata (nios2_debug_mem_slave_agent_m0_writedata), // .writedata
  1086. .m0_write (nios2_debug_mem_slave_agent_m0_write), // .write
  1087. .rp_endofpacket (nios2_debug_mem_slave_agent_rp_endofpacket), // rp.endofpacket
  1088. .rp_ready (nios2_debug_mem_slave_agent_rp_ready), // .ready
  1089. .rp_valid (nios2_debug_mem_slave_agent_rp_valid), // .valid
  1090. .rp_data (nios2_debug_mem_slave_agent_rp_data), // .data
  1091. .rp_startofpacket (nios2_debug_mem_slave_agent_rp_startofpacket), // .startofpacket
  1092. .cp_ready (cmd_mux_001_src_ready), // cp.ready
  1093. .cp_valid (cmd_mux_001_src_valid), // .valid
  1094. .cp_data (cmd_mux_001_src_data), // .data
  1095. .cp_startofpacket (cmd_mux_001_src_startofpacket), // .startofpacket
  1096. .cp_endofpacket (cmd_mux_001_src_endofpacket), // .endofpacket
  1097. .cp_channel (cmd_mux_001_src_channel), // .channel
  1098. .rf_sink_ready (nios2_debug_mem_slave_agent_rsp_fifo_out_ready), // rf_sink.ready
  1099. .rf_sink_valid (nios2_debug_mem_slave_agent_rsp_fifo_out_valid), // .valid
  1100. .rf_sink_startofpacket (nios2_debug_mem_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1101. .rf_sink_endofpacket (nios2_debug_mem_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1102. .rf_sink_data (nios2_debug_mem_slave_agent_rsp_fifo_out_data), // .data
  1103. .rf_source_ready (nios2_debug_mem_slave_agent_rf_source_ready), // rf_source.ready
  1104. .rf_source_valid (nios2_debug_mem_slave_agent_rf_source_valid), // .valid
  1105. .rf_source_startofpacket (nios2_debug_mem_slave_agent_rf_source_startofpacket), // .startofpacket
  1106. .rf_source_endofpacket (nios2_debug_mem_slave_agent_rf_source_endofpacket), // .endofpacket
  1107. .rf_source_data (nios2_debug_mem_slave_agent_rf_source_data), // .data
  1108. .rdata_fifo_sink_ready (avalon_st_adapter_001_out_0_ready), // rdata_fifo_sink.ready
  1109. .rdata_fifo_sink_valid (avalon_st_adapter_001_out_0_valid), // .valid
  1110. .rdata_fifo_sink_data (avalon_st_adapter_001_out_0_data), // .data
  1111. .rdata_fifo_sink_error (avalon_st_adapter_001_out_0_error), // .error
  1112. .rdata_fifo_src_ready (nios2_debug_mem_slave_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready
  1113. .rdata_fifo_src_valid (nios2_debug_mem_slave_agent_rdata_fifo_src_valid), // .valid
  1114. .rdata_fifo_src_data (nios2_debug_mem_slave_agent_rdata_fifo_src_data), // .data
  1115. .m0_response (2'b00), // (terminated)
  1116. .m0_writeresponsevalid (1'b0) // (terminated)
  1117. );
  1118. altera_avalon_sc_fifo #(
  1119. .SYMBOLS_PER_BEAT (1),
  1120. .BITS_PER_SYMBOL (95),
  1121. .FIFO_DEPTH (2),
  1122. .CHANNEL_WIDTH (0),
  1123. .ERROR_WIDTH (0),
  1124. .USE_PACKETS (1),
  1125. .USE_FILL_LEVEL (0),
  1126. .EMPTY_LATENCY (1),
  1127. .USE_MEMORY_BLOCKS (0),
  1128. .USE_STORE_FORWARD (0),
  1129. .USE_ALMOST_FULL_IF (0),
  1130. .USE_ALMOST_EMPTY_IF (0)
  1131. ) nios2_debug_mem_slave_agent_rsp_fifo (
  1132. .clk (clk_50_clk_clk), // clk.clk
  1133. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1134. .in_data (nios2_debug_mem_slave_agent_rf_source_data), // in.data
  1135. .in_valid (nios2_debug_mem_slave_agent_rf_source_valid), // .valid
  1136. .in_ready (nios2_debug_mem_slave_agent_rf_source_ready), // .ready
  1137. .in_startofpacket (nios2_debug_mem_slave_agent_rf_source_startofpacket), // .startofpacket
  1138. .in_endofpacket (nios2_debug_mem_slave_agent_rf_source_endofpacket), // .endofpacket
  1139. .out_data (nios2_debug_mem_slave_agent_rsp_fifo_out_data), // out.data
  1140. .out_valid (nios2_debug_mem_slave_agent_rsp_fifo_out_valid), // .valid
  1141. .out_ready (nios2_debug_mem_slave_agent_rsp_fifo_out_ready), // .ready
  1142. .out_startofpacket (nios2_debug_mem_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1143. .out_endofpacket (nios2_debug_mem_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1144. .csr_address (2'b00), // (terminated)
  1145. .csr_read (1'b0), // (terminated)
  1146. .csr_write (1'b0), // (terminated)
  1147. .csr_readdata (), // (terminated)
  1148. .csr_writedata (32'b00000000000000000000000000000000), // (terminated)
  1149. .almost_full_data (), // (terminated)
  1150. .almost_empty_data (), // (terminated)
  1151. .in_empty (1'b0), // (terminated)
  1152. .out_empty (), // (terminated)
  1153. .in_error (1'b0), // (terminated)
  1154. .out_error (), // (terminated)
  1155. .in_channel (1'b0), // (terminated)
  1156. .out_channel () // (terminated)
  1157. );
  1158. altera_merlin_slave_agent #(
  1159. .PKT_ORI_BURST_SIZE_H (93),
  1160. .PKT_ORI_BURST_SIZE_L (91),
  1161. .PKT_RESPONSE_STATUS_H (90),
  1162. .PKT_RESPONSE_STATUS_L (89),
  1163. .PKT_BURST_SIZE_H (70),
  1164. .PKT_BURST_SIZE_L (68),
  1165. .PKT_TRANS_LOCK (60),
  1166. .PKT_BEGIN_BURST (75),
  1167. .PKT_PROTECTION_H (84),
  1168. .PKT_PROTECTION_L (82),
  1169. .PKT_BURSTWRAP_H (67),
  1170. .PKT_BURSTWRAP_L (65),
  1171. .PKT_BYTE_CNT_H (64),
  1172. .PKT_BYTE_CNT_L (62),
  1173. .PKT_ADDR_H (55),
  1174. .PKT_ADDR_L (36),
  1175. .PKT_TRANS_COMPRESSED_READ (56),
  1176. .PKT_TRANS_POSTED (57),
  1177. .PKT_TRANS_WRITE (58),
  1178. .PKT_TRANS_READ (59),
  1179. .PKT_DATA_H (31),
  1180. .PKT_DATA_L (0),
  1181. .PKT_BYTEEN_H (35),
  1182. .PKT_BYTEEN_L (32),
  1183. .PKT_SRC_ID_H (78),
  1184. .PKT_SRC_ID_L (77),
  1185. .PKT_DEST_ID_H (80),
  1186. .PKT_DEST_ID_L (79),
  1187. .PKT_SYMBOL_W (8),
  1188. .ST_CHANNEL_W (4),
  1189. .ST_DATA_W (94),
  1190. .AVS_BURSTCOUNT_W (3),
  1191. .SUPPRESS_0_BYTEEN_CMD (0),
  1192. .PREVENT_FIFO_OVERFLOW (1),
  1193. .USE_READRESPONSE (0),
  1194. .USE_WRITERESPONSE (0),
  1195. .ECC_ENABLE (0)
  1196. ) onchip_memory2_s1_agent (
  1197. .clk (clk_50_clk_clk), // clk.clk
  1198. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1199. .m0_address (onchip_memory2_s1_agent_m0_address), // m0.address
  1200. .m0_burstcount (onchip_memory2_s1_agent_m0_burstcount), // .burstcount
  1201. .m0_byteenable (onchip_memory2_s1_agent_m0_byteenable), // .byteenable
  1202. .m0_debugaccess (onchip_memory2_s1_agent_m0_debugaccess), // .debugaccess
  1203. .m0_lock (onchip_memory2_s1_agent_m0_lock), // .lock
  1204. .m0_readdata (onchip_memory2_s1_agent_m0_readdata), // .readdata
  1205. .m0_readdatavalid (onchip_memory2_s1_agent_m0_readdatavalid), // .readdatavalid
  1206. .m0_read (onchip_memory2_s1_agent_m0_read), // .read
  1207. .m0_waitrequest (onchip_memory2_s1_agent_m0_waitrequest), // .waitrequest
  1208. .m0_writedata (onchip_memory2_s1_agent_m0_writedata), // .writedata
  1209. .m0_write (onchip_memory2_s1_agent_m0_write), // .write
  1210. .rp_endofpacket (onchip_memory2_s1_agent_rp_endofpacket), // rp.endofpacket
  1211. .rp_ready (onchip_memory2_s1_agent_rp_ready), // .ready
  1212. .rp_valid (onchip_memory2_s1_agent_rp_valid), // .valid
  1213. .rp_data (onchip_memory2_s1_agent_rp_data), // .data
  1214. .rp_startofpacket (onchip_memory2_s1_agent_rp_startofpacket), // .startofpacket
  1215. .cp_ready (cmd_mux_002_src_ready), // cp.ready
  1216. .cp_valid (cmd_mux_002_src_valid), // .valid
  1217. .cp_data (cmd_mux_002_src_data), // .data
  1218. .cp_startofpacket (cmd_mux_002_src_startofpacket), // .startofpacket
  1219. .cp_endofpacket (cmd_mux_002_src_endofpacket), // .endofpacket
  1220. .cp_channel (cmd_mux_002_src_channel), // .channel
  1221. .rf_sink_ready (onchip_memory2_s1_agent_rsp_fifo_out_ready), // rf_sink.ready
  1222. .rf_sink_valid (onchip_memory2_s1_agent_rsp_fifo_out_valid), // .valid
  1223. .rf_sink_startofpacket (onchip_memory2_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1224. .rf_sink_endofpacket (onchip_memory2_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1225. .rf_sink_data (onchip_memory2_s1_agent_rsp_fifo_out_data), // .data
  1226. .rf_source_ready (onchip_memory2_s1_agent_rf_source_ready), // rf_source.ready
  1227. .rf_source_valid (onchip_memory2_s1_agent_rf_source_valid), // .valid
  1228. .rf_source_startofpacket (onchip_memory2_s1_agent_rf_source_startofpacket), // .startofpacket
  1229. .rf_source_endofpacket (onchip_memory2_s1_agent_rf_source_endofpacket), // .endofpacket
  1230. .rf_source_data (onchip_memory2_s1_agent_rf_source_data), // .data
  1231. .rdata_fifo_sink_ready (avalon_st_adapter_002_out_0_ready), // rdata_fifo_sink.ready
  1232. .rdata_fifo_sink_valid (avalon_st_adapter_002_out_0_valid), // .valid
  1233. .rdata_fifo_sink_data (avalon_st_adapter_002_out_0_data), // .data
  1234. .rdata_fifo_sink_error (avalon_st_adapter_002_out_0_error), // .error
  1235. .rdata_fifo_src_ready (onchip_memory2_s1_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready
  1236. .rdata_fifo_src_valid (onchip_memory2_s1_agent_rdata_fifo_src_valid), // .valid
  1237. .rdata_fifo_src_data (onchip_memory2_s1_agent_rdata_fifo_src_data), // .data
  1238. .m0_response (2'b00), // (terminated)
  1239. .m0_writeresponsevalid (1'b0) // (terminated)
  1240. );
  1241. altera_avalon_sc_fifo #(
  1242. .SYMBOLS_PER_BEAT (1),
  1243. .BITS_PER_SYMBOL (95),
  1244. .FIFO_DEPTH (2),
  1245. .CHANNEL_WIDTH (0),
  1246. .ERROR_WIDTH (0),
  1247. .USE_PACKETS (1),
  1248. .USE_FILL_LEVEL (0),
  1249. .EMPTY_LATENCY (1),
  1250. .USE_MEMORY_BLOCKS (0),
  1251. .USE_STORE_FORWARD (0),
  1252. .USE_ALMOST_FULL_IF (0),
  1253. .USE_ALMOST_EMPTY_IF (0)
  1254. ) onchip_memory2_s1_agent_rsp_fifo (
  1255. .clk (clk_50_clk_clk), // clk.clk
  1256. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1257. .in_data (onchip_memory2_s1_agent_rf_source_data), // in.data
  1258. .in_valid (onchip_memory2_s1_agent_rf_source_valid), // .valid
  1259. .in_ready (onchip_memory2_s1_agent_rf_source_ready), // .ready
  1260. .in_startofpacket (onchip_memory2_s1_agent_rf_source_startofpacket), // .startofpacket
  1261. .in_endofpacket (onchip_memory2_s1_agent_rf_source_endofpacket), // .endofpacket
  1262. .out_data (onchip_memory2_s1_agent_rsp_fifo_out_data), // out.data
  1263. .out_valid (onchip_memory2_s1_agent_rsp_fifo_out_valid), // .valid
  1264. .out_ready (onchip_memory2_s1_agent_rsp_fifo_out_ready), // .ready
  1265. .out_startofpacket (onchip_memory2_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1266. .out_endofpacket (onchip_memory2_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1267. .csr_address (2'b00), // (terminated)
  1268. .csr_read (1'b0), // (terminated)
  1269. .csr_write (1'b0), // (terminated)
  1270. .csr_readdata (), // (terminated)
  1271. .csr_writedata (32'b00000000000000000000000000000000), // (terminated)
  1272. .almost_full_data (), // (terminated)
  1273. .almost_empty_data (), // (terminated)
  1274. .in_empty (1'b0), // (terminated)
  1275. .out_empty (), // (terminated)
  1276. .in_error (1'b0), // (terminated)
  1277. .out_error (), // (terminated)
  1278. .in_channel (1'b0), // (terminated)
  1279. .out_channel () // (terminated)
  1280. );
  1281. altera_merlin_slave_agent #(
  1282. .PKT_ORI_BURST_SIZE_H (93),
  1283. .PKT_ORI_BURST_SIZE_L (91),
  1284. .PKT_RESPONSE_STATUS_H (90),
  1285. .PKT_RESPONSE_STATUS_L (89),
  1286. .PKT_BURST_SIZE_H (70),
  1287. .PKT_BURST_SIZE_L (68),
  1288. .PKT_TRANS_LOCK (60),
  1289. .PKT_BEGIN_BURST (75),
  1290. .PKT_PROTECTION_H (84),
  1291. .PKT_PROTECTION_L (82),
  1292. .PKT_BURSTWRAP_H (67),
  1293. .PKT_BURSTWRAP_L (65),
  1294. .PKT_BYTE_CNT_H (64),
  1295. .PKT_BYTE_CNT_L (62),
  1296. .PKT_ADDR_H (55),
  1297. .PKT_ADDR_L (36),
  1298. .PKT_TRANS_COMPRESSED_READ (56),
  1299. .PKT_TRANS_POSTED (57),
  1300. .PKT_TRANS_WRITE (58),
  1301. .PKT_TRANS_READ (59),
  1302. .PKT_DATA_H (31),
  1303. .PKT_DATA_L (0),
  1304. .PKT_BYTEEN_H (35),
  1305. .PKT_BYTEEN_L (32),
  1306. .PKT_SRC_ID_H (78),
  1307. .PKT_SRC_ID_L (77),
  1308. .PKT_DEST_ID_H (80),
  1309. .PKT_DEST_ID_L (79),
  1310. .PKT_SYMBOL_W (8),
  1311. .ST_CHANNEL_W (4),
  1312. .ST_DATA_W (94),
  1313. .AVS_BURSTCOUNT_W (3),
  1314. .SUPPRESS_0_BYTEEN_CMD (0),
  1315. .PREVENT_FIFO_OVERFLOW (1),
  1316. .USE_READRESPONSE (0),
  1317. .USE_WRITERESPONSE (0),
  1318. .ECC_ENABLE (0)
  1319. ) pio_led_s1_agent (
  1320. .clk (clk_50_clk_clk), // clk.clk
  1321. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1322. .m0_address (pio_led_s1_agent_m0_address), // m0.address
  1323. .m0_burstcount (pio_led_s1_agent_m0_burstcount), // .burstcount
  1324. .m0_byteenable (pio_led_s1_agent_m0_byteenable), // .byteenable
  1325. .m0_debugaccess (pio_led_s1_agent_m0_debugaccess), // .debugaccess
  1326. .m0_lock (pio_led_s1_agent_m0_lock), // .lock
  1327. .m0_readdata (pio_led_s1_agent_m0_readdata), // .readdata
  1328. .m0_readdatavalid (pio_led_s1_agent_m0_readdatavalid), // .readdatavalid
  1329. .m0_read (pio_led_s1_agent_m0_read), // .read
  1330. .m0_waitrequest (pio_led_s1_agent_m0_waitrequest), // .waitrequest
  1331. .m0_writedata (pio_led_s1_agent_m0_writedata), // .writedata
  1332. .m0_write (pio_led_s1_agent_m0_write), // .write
  1333. .rp_endofpacket (pio_led_s1_agent_rp_endofpacket), // rp.endofpacket
  1334. .rp_ready (pio_led_s1_agent_rp_ready), // .ready
  1335. .rp_valid (pio_led_s1_agent_rp_valid), // .valid
  1336. .rp_data (pio_led_s1_agent_rp_data), // .data
  1337. .rp_startofpacket (pio_led_s1_agent_rp_startofpacket), // .startofpacket
  1338. .cp_ready (cmd_mux_003_src_ready), // cp.ready
  1339. .cp_valid (cmd_mux_003_src_valid), // .valid
  1340. .cp_data (cmd_mux_003_src_data), // .data
  1341. .cp_startofpacket (cmd_mux_003_src_startofpacket), // .startofpacket
  1342. .cp_endofpacket (cmd_mux_003_src_endofpacket), // .endofpacket
  1343. .cp_channel (cmd_mux_003_src_channel), // .channel
  1344. .rf_sink_ready (pio_led_s1_agent_rsp_fifo_out_ready), // rf_sink.ready
  1345. .rf_sink_valid (pio_led_s1_agent_rsp_fifo_out_valid), // .valid
  1346. .rf_sink_startofpacket (pio_led_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1347. .rf_sink_endofpacket (pio_led_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1348. .rf_sink_data (pio_led_s1_agent_rsp_fifo_out_data), // .data
  1349. .rf_source_ready (pio_led_s1_agent_rf_source_ready), // rf_source.ready
  1350. .rf_source_valid (pio_led_s1_agent_rf_source_valid), // .valid
  1351. .rf_source_startofpacket (pio_led_s1_agent_rf_source_startofpacket), // .startofpacket
  1352. .rf_source_endofpacket (pio_led_s1_agent_rf_source_endofpacket), // .endofpacket
  1353. .rf_source_data (pio_led_s1_agent_rf_source_data), // .data
  1354. .rdata_fifo_sink_ready (avalon_st_adapter_003_out_0_ready), // rdata_fifo_sink.ready
  1355. .rdata_fifo_sink_valid (avalon_st_adapter_003_out_0_valid), // .valid
  1356. .rdata_fifo_sink_data (avalon_st_adapter_003_out_0_data), // .data
  1357. .rdata_fifo_sink_error (avalon_st_adapter_003_out_0_error), // .error
  1358. .rdata_fifo_src_ready (pio_led_s1_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready
  1359. .rdata_fifo_src_valid (pio_led_s1_agent_rdata_fifo_src_valid), // .valid
  1360. .rdata_fifo_src_data (pio_led_s1_agent_rdata_fifo_src_data), // .data
  1361. .m0_response (2'b00), // (terminated)
  1362. .m0_writeresponsevalid (1'b0) // (terminated)
  1363. );
  1364. altera_avalon_sc_fifo #(
  1365. .SYMBOLS_PER_BEAT (1),
  1366. .BITS_PER_SYMBOL (95),
  1367. .FIFO_DEPTH (2),
  1368. .CHANNEL_WIDTH (0),
  1369. .ERROR_WIDTH (0),
  1370. .USE_PACKETS (1),
  1371. .USE_FILL_LEVEL (0),
  1372. .EMPTY_LATENCY (1),
  1373. .USE_MEMORY_BLOCKS (0),
  1374. .USE_STORE_FORWARD (0),
  1375. .USE_ALMOST_FULL_IF (0),
  1376. .USE_ALMOST_EMPTY_IF (0)
  1377. ) pio_led_s1_agent_rsp_fifo (
  1378. .clk (clk_50_clk_clk), // clk.clk
  1379. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1380. .in_data (pio_led_s1_agent_rf_source_data), // in.data
  1381. .in_valid (pio_led_s1_agent_rf_source_valid), // .valid
  1382. .in_ready (pio_led_s1_agent_rf_source_ready), // .ready
  1383. .in_startofpacket (pio_led_s1_agent_rf_source_startofpacket), // .startofpacket
  1384. .in_endofpacket (pio_led_s1_agent_rf_source_endofpacket), // .endofpacket
  1385. .out_data (pio_led_s1_agent_rsp_fifo_out_data), // out.data
  1386. .out_valid (pio_led_s1_agent_rsp_fifo_out_valid), // .valid
  1387. .out_ready (pio_led_s1_agent_rsp_fifo_out_ready), // .ready
  1388. .out_startofpacket (pio_led_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket
  1389. .out_endofpacket (pio_led_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket
  1390. .csr_address (2'b00), // (terminated)
  1391. .csr_read (1'b0), // (terminated)
  1392. .csr_write (1'b0), // (terminated)
  1393. .csr_readdata (), // (terminated)
  1394. .csr_writedata (32'b00000000000000000000000000000000), // (terminated)
  1395. .almost_full_data (), // (terminated)
  1396. .almost_empty_data (), // (terminated)
  1397. .in_empty (1'b0), // (terminated)
  1398. .out_empty (), // (terminated)
  1399. .in_error (1'b0), // (terminated)
  1400. .out_error (), // (terminated)
  1401. .in_channel (1'b0), // (terminated)
  1402. .out_channel () // (terminated)
  1403. );
  1404. nios2_uc_mm_interconnect_0_router router (
  1405. .sink_ready (nios2_data_master_agent_cp_ready), // sink.ready
  1406. .sink_valid (nios2_data_master_agent_cp_valid), // .valid
  1407. .sink_data (nios2_data_master_agent_cp_data), // .data
  1408. .sink_startofpacket (nios2_data_master_agent_cp_startofpacket), // .startofpacket
  1409. .sink_endofpacket (nios2_data_master_agent_cp_endofpacket), // .endofpacket
  1410. .clk (clk_50_clk_clk), // clk.clk
  1411. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1412. .src_ready (router_src_ready), // src.ready
  1413. .src_valid (router_src_valid), // .valid
  1414. .src_data (router_src_data), // .data
  1415. .src_channel (router_src_channel), // .channel
  1416. .src_startofpacket (router_src_startofpacket), // .startofpacket
  1417. .src_endofpacket (router_src_endofpacket) // .endofpacket
  1418. );
  1419. nios2_uc_mm_interconnect_0_router router_001 (
  1420. .sink_ready (nios2_instruction_master_agent_cp_ready), // sink.ready
  1421. .sink_valid (nios2_instruction_master_agent_cp_valid), // .valid
  1422. .sink_data (nios2_instruction_master_agent_cp_data), // .data
  1423. .sink_startofpacket (nios2_instruction_master_agent_cp_startofpacket), // .startofpacket
  1424. .sink_endofpacket (nios2_instruction_master_agent_cp_endofpacket), // .endofpacket
  1425. .clk (clk_50_clk_clk), // clk.clk
  1426. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1427. .src_ready (router_001_src_ready), // src.ready
  1428. .src_valid (router_001_src_valid), // .valid
  1429. .src_data (router_001_src_data), // .data
  1430. .src_channel (router_001_src_channel), // .channel
  1431. .src_startofpacket (router_001_src_startofpacket), // .startofpacket
  1432. .src_endofpacket (router_001_src_endofpacket) // .endofpacket
  1433. );
  1434. nios2_uc_mm_interconnect_0_router_002 router_002 (
  1435. .sink_ready (jtag_uart_avalon_jtag_slave_agent_rp_ready), // sink.ready
  1436. .sink_valid (jtag_uart_avalon_jtag_slave_agent_rp_valid), // .valid
  1437. .sink_data (jtag_uart_avalon_jtag_slave_agent_rp_data), // .data
  1438. .sink_startofpacket (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket), // .startofpacket
  1439. .sink_endofpacket (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket), // .endofpacket
  1440. .clk (clk_50_clk_clk), // clk.clk
  1441. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1442. .src_ready (router_002_src_ready), // src.ready
  1443. .src_valid (router_002_src_valid), // .valid
  1444. .src_data (router_002_src_data), // .data
  1445. .src_channel (router_002_src_channel), // .channel
  1446. .src_startofpacket (router_002_src_startofpacket), // .startofpacket
  1447. .src_endofpacket (router_002_src_endofpacket) // .endofpacket
  1448. );
  1449. nios2_uc_mm_interconnect_0_router_002 router_003 (
  1450. .sink_ready (nios2_debug_mem_slave_agent_rp_ready), // sink.ready
  1451. .sink_valid (nios2_debug_mem_slave_agent_rp_valid), // .valid
  1452. .sink_data (nios2_debug_mem_slave_agent_rp_data), // .data
  1453. .sink_startofpacket (nios2_debug_mem_slave_agent_rp_startofpacket), // .startofpacket
  1454. .sink_endofpacket (nios2_debug_mem_slave_agent_rp_endofpacket), // .endofpacket
  1455. .clk (clk_50_clk_clk), // clk.clk
  1456. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1457. .src_ready (router_003_src_ready), // src.ready
  1458. .src_valid (router_003_src_valid), // .valid
  1459. .src_data (router_003_src_data), // .data
  1460. .src_channel (router_003_src_channel), // .channel
  1461. .src_startofpacket (router_003_src_startofpacket), // .startofpacket
  1462. .src_endofpacket (router_003_src_endofpacket) // .endofpacket
  1463. );
  1464. nios2_uc_mm_interconnect_0_router_002 router_004 (
  1465. .sink_ready (onchip_memory2_s1_agent_rp_ready), // sink.ready
  1466. .sink_valid (onchip_memory2_s1_agent_rp_valid), // .valid
  1467. .sink_data (onchip_memory2_s1_agent_rp_data), // .data
  1468. .sink_startofpacket (onchip_memory2_s1_agent_rp_startofpacket), // .startofpacket
  1469. .sink_endofpacket (onchip_memory2_s1_agent_rp_endofpacket), // .endofpacket
  1470. .clk (clk_50_clk_clk), // clk.clk
  1471. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1472. .src_ready (router_004_src_ready), // src.ready
  1473. .src_valid (router_004_src_valid), // .valid
  1474. .src_data (router_004_src_data), // .data
  1475. .src_channel (router_004_src_channel), // .channel
  1476. .src_startofpacket (router_004_src_startofpacket), // .startofpacket
  1477. .src_endofpacket (router_004_src_endofpacket) // .endofpacket
  1478. );
  1479. nios2_uc_mm_interconnect_0_router_002 router_005 (
  1480. .sink_ready (pio_led_s1_agent_rp_ready), // sink.ready
  1481. .sink_valid (pio_led_s1_agent_rp_valid), // .valid
  1482. .sink_data (pio_led_s1_agent_rp_data), // .data
  1483. .sink_startofpacket (pio_led_s1_agent_rp_startofpacket), // .startofpacket
  1484. .sink_endofpacket (pio_led_s1_agent_rp_endofpacket), // .endofpacket
  1485. .clk (clk_50_clk_clk), // clk.clk
  1486. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1487. .src_ready (router_005_src_ready), // src.ready
  1488. .src_valid (router_005_src_valid), // .valid
  1489. .src_data (router_005_src_data), // .data
  1490. .src_channel (router_005_src_channel), // .channel
  1491. .src_startofpacket (router_005_src_startofpacket), // .startofpacket
  1492. .src_endofpacket (router_005_src_endofpacket) // .endofpacket
  1493. );
  1494. nios2_uc_mm_interconnect_0_cmd_demux cmd_demux (
  1495. .clk (clk_50_clk_clk), // clk.clk
  1496. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1497. .sink_ready (router_src_ready), // sink.ready
  1498. .sink_channel (router_src_channel), // .channel
  1499. .sink_data (router_src_data), // .data
  1500. .sink_startofpacket (router_src_startofpacket), // .startofpacket
  1501. .sink_endofpacket (router_src_endofpacket), // .endofpacket
  1502. .sink_valid (router_src_valid), // .valid
  1503. .src0_ready (cmd_demux_src0_ready), // src0.ready
  1504. .src0_valid (cmd_demux_src0_valid), // .valid
  1505. .src0_data (cmd_demux_src0_data), // .data
  1506. .src0_channel (cmd_demux_src0_channel), // .channel
  1507. .src0_startofpacket (cmd_demux_src0_startofpacket), // .startofpacket
  1508. .src0_endofpacket (cmd_demux_src0_endofpacket), // .endofpacket
  1509. .src1_ready (cmd_demux_src1_ready), // src1.ready
  1510. .src1_valid (cmd_demux_src1_valid), // .valid
  1511. .src1_data (cmd_demux_src1_data), // .data
  1512. .src1_channel (cmd_demux_src1_channel), // .channel
  1513. .src1_startofpacket (cmd_demux_src1_startofpacket), // .startofpacket
  1514. .src1_endofpacket (cmd_demux_src1_endofpacket), // .endofpacket
  1515. .src2_ready (cmd_demux_src2_ready), // src2.ready
  1516. .src2_valid (cmd_demux_src2_valid), // .valid
  1517. .src2_data (cmd_demux_src2_data), // .data
  1518. .src2_channel (cmd_demux_src2_channel), // .channel
  1519. .src2_startofpacket (cmd_demux_src2_startofpacket), // .startofpacket
  1520. .src2_endofpacket (cmd_demux_src2_endofpacket), // .endofpacket
  1521. .src3_ready (cmd_demux_src3_ready), // src3.ready
  1522. .src3_valid (cmd_demux_src3_valid), // .valid
  1523. .src3_data (cmd_demux_src3_data), // .data
  1524. .src3_channel (cmd_demux_src3_channel), // .channel
  1525. .src3_startofpacket (cmd_demux_src3_startofpacket), // .startofpacket
  1526. .src3_endofpacket (cmd_demux_src3_endofpacket) // .endofpacket
  1527. );
  1528. nios2_uc_mm_interconnect_0_cmd_demux cmd_demux_001 (
  1529. .clk (clk_50_clk_clk), // clk.clk
  1530. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1531. .sink_ready (router_001_src_ready), // sink.ready
  1532. .sink_channel (router_001_src_channel), // .channel
  1533. .sink_data (router_001_src_data), // .data
  1534. .sink_startofpacket (router_001_src_startofpacket), // .startofpacket
  1535. .sink_endofpacket (router_001_src_endofpacket), // .endofpacket
  1536. .sink_valid (router_001_src_valid), // .valid
  1537. .src0_ready (cmd_demux_001_src0_ready), // src0.ready
  1538. .src0_valid (cmd_demux_001_src0_valid), // .valid
  1539. .src0_data (cmd_demux_001_src0_data), // .data
  1540. .src0_channel (cmd_demux_001_src0_channel), // .channel
  1541. .src0_startofpacket (cmd_demux_001_src0_startofpacket), // .startofpacket
  1542. .src0_endofpacket (cmd_demux_001_src0_endofpacket), // .endofpacket
  1543. .src1_ready (cmd_demux_001_src1_ready), // src1.ready
  1544. .src1_valid (cmd_demux_001_src1_valid), // .valid
  1545. .src1_data (cmd_demux_001_src1_data), // .data
  1546. .src1_channel (cmd_demux_001_src1_channel), // .channel
  1547. .src1_startofpacket (cmd_demux_001_src1_startofpacket), // .startofpacket
  1548. .src1_endofpacket (cmd_demux_001_src1_endofpacket), // .endofpacket
  1549. .src2_ready (cmd_demux_001_src2_ready), // src2.ready
  1550. .src2_valid (cmd_demux_001_src2_valid), // .valid
  1551. .src2_data (cmd_demux_001_src2_data), // .data
  1552. .src2_channel (cmd_demux_001_src2_channel), // .channel
  1553. .src2_startofpacket (cmd_demux_001_src2_startofpacket), // .startofpacket
  1554. .src2_endofpacket (cmd_demux_001_src2_endofpacket), // .endofpacket
  1555. .src3_ready (cmd_demux_001_src3_ready), // src3.ready
  1556. .src3_valid (cmd_demux_001_src3_valid), // .valid
  1557. .src3_data (cmd_demux_001_src3_data), // .data
  1558. .src3_channel (cmd_demux_001_src3_channel), // .channel
  1559. .src3_startofpacket (cmd_demux_001_src3_startofpacket), // .startofpacket
  1560. .src3_endofpacket (cmd_demux_001_src3_endofpacket) // .endofpacket
  1561. );
  1562. nios2_uc_mm_interconnect_0_cmd_mux cmd_mux (
  1563. .clk (clk_50_clk_clk), // clk.clk
  1564. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1565. .src_ready (cmd_mux_src_ready), // src.ready
  1566. .src_valid (cmd_mux_src_valid), // .valid
  1567. .src_data (cmd_mux_src_data), // .data
  1568. .src_channel (cmd_mux_src_channel), // .channel
  1569. .src_startofpacket (cmd_mux_src_startofpacket), // .startofpacket
  1570. .src_endofpacket (cmd_mux_src_endofpacket), // .endofpacket
  1571. .sink0_ready (cmd_demux_src0_ready), // sink0.ready
  1572. .sink0_valid (cmd_demux_src0_valid), // .valid
  1573. .sink0_channel (cmd_demux_src0_channel), // .channel
  1574. .sink0_data (cmd_demux_src0_data), // .data
  1575. .sink0_startofpacket (cmd_demux_src0_startofpacket), // .startofpacket
  1576. .sink0_endofpacket (cmd_demux_src0_endofpacket), // .endofpacket
  1577. .sink1_ready (cmd_demux_001_src0_ready), // sink1.ready
  1578. .sink1_valid (cmd_demux_001_src0_valid), // .valid
  1579. .sink1_channel (cmd_demux_001_src0_channel), // .channel
  1580. .sink1_data (cmd_demux_001_src0_data), // .data
  1581. .sink1_startofpacket (cmd_demux_001_src0_startofpacket), // .startofpacket
  1582. .sink1_endofpacket (cmd_demux_001_src0_endofpacket) // .endofpacket
  1583. );
  1584. nios2_uc_mm_interconnect_0_cmd_mux cmd_mux_001 (
  1585. .clk (clk_50_clk_clk), // clk.clk
  1586. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1587. .src_ready (cmd_mux_001_src_ready), // src.ready
  1588. .src_valid (cmd_mux_001_src_valid), // .valid
  1589. .src_data (cmd_mux_001_src_data), // .data
  1590. .src_channel (cmd_mux_001_src_channel), // .channel
  1591. .src_startofpacket (cmd_mux_001_src_startofpacket), // .startofpacket
  1592. .src_endofpacket (cmd_mux_001_src_endofpacket), // .endofpacket
  1593. .sink0_ready (cmd_demux_src1_ready), // sink0.ready
  1594. .sink0_valid (cmd_demux_src1_valid), // .valid
  1595. .sink0_channel (cmd_demux_src1_channel), // .channel
  1596. .sink0_data (cmd_demux_src1_data), // .data
  1597. .sink0_startofpacket (cmd_demux_src1_startofpacket), // .startofpacket
  1598. .sink0_endofpacket (cmd_demux_src1_endofpacket), // .endofpacket
  1599. .sink1_ready (cmd_demux_001_src1_ready), // sink1.ready
  1600. .sink1_valid (cmd_demux_001_src1_valid), // .valid
  1601. .sink1_channel (cmd_demux_001_src1_channel), // .channel
  1602. .sink1_data (cmd_demux_001_src1_data), // .data
  1603. .sink1_startofpacket (cmd_demux_001_src1_startofpacket), // .startofpacket
  1604. .sink1_endofpacket (cmd_demux_001_src1_endofpacket) // .endofpacket
  1605. );
  1606. nios2_uc_mm_interconnect_0_cmd_mux cmd_mux_002 (
  1607. .clk (clk_50_clk_clk), // clk.clk
  1608. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1609. .src_ready (cmd_mux_002_src_ready), // src.ready
  1610. .src_valid (cmd_mux_002_src_valid), // .valid
  1611. .src_data (cmd_mux_002_src_data), // .data
  1612. .src_channel (cmd_mux_002_src_channel), // .channel
  1613. .src_startofpacket (cmd_mux_002_src_startofpacket), // .startofpacket
  1614. .src_endofpacket (cmd_mux_002_src_endofpacket), // .endofpacket
  1615. .sink0_ready (cmd_demux_src2_ready), // sink0.ready
  1616. .sink0_valid (cmd_demux_src2_valid), // .valid
  1617. .sink0_channel (cmd_demux_src2_channel), // .channel
  1618. .sink0_data (cmd_demux_src2_data), // .data
  1619. .sink0_startofpacket (cmd_demux_src2_startofpacket), // .startofpacket
  1620. .sink0_endofpacket (cmd_demux_src2_endofpacket), // .endofpacket
  1621. .sink1_ready (cmd_demux_001_src2_ready), // sink1.ready
  1622. .sink1_valid (cmd_demux_001_src2_valid), // .valid
  1623. .sink1_channel (cmd_demux_001_src2_channel), // .channel
  1624. .sink1_data (cmd_demux_001_src2_data), // .data
  1625. .sink1_startofpacket (cmd_demux_001_src2_startofpacket), // .startofpacket
  1626. .sink1_endofpacket (cmd_demux_001_src2_endofpacket) // .endofpacket
  1627. );
  1628. nios2_uc_mm_interconnect_0_cmd_mux cmd_mux_003 (
  1629. .clk (clk_50_clk_clk), // clk.clk
  1630. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1631. .src_ready (cmd_mux_003_src_ready), // src.ready
  1632. .src_valid (cmd_mux_003_src_valid), // .valid
  1633. .src_data (cmd_mux_003_src_data), // .data
  1634. .src_channel (cmd_mux_003_src_channel), // .channel
  1635. .src_startofpacket (cmd_mux_003_src_startofpacket), // .startofpacket
  1636. .src_endofpacket (cmd_mux_003_src_endofpacket), // .endofpacket
  1637. .sink0_ready (cmd_demux_src3_ready), // sink0.ready
  1638. .sink0_valid (cmd_demux_src3_valid), // .valid
  1639. .sink0_channel (cmd_demux_src3_channel), // .channel
  1640. .sink0_data (cmd_demux_src3_data), // .data
  1641. .sink0_startofpacket (cmd_demux_src3_startofpacket), // .startofpacket
  1642. .sink0_endofpacket (cmd_demux_src3_endofpacket), // .endofpacket
  1643. .sink1_ready (cmd_demux_001_src3_ready), // sink1.ready
  1644. .sink1_valid (cmd_demux_001_src3_valid), // .valid
  1645. .sink1_channel (cmd_demux_001_src3_channel), // .channel
  1646. .sink1_data (cmd_demux_001_src3_data), // .data
  1647. .sink1_startofpacket (cmd_demux_001_src3_startofpacket), // .startofpacket
  1648. .sink1_endofpacket (cmd_demux_001_src3_endofpacket) // .endofpacket
  1649. );
  1650. nios2_uc_mm_interconnect_0_rsp_demux rsp_demux (
  1651. .clk (clk_50_clk_clk), // clk.clk
  1652. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1653. .sink_ready (router_002_src_ready), // sink.ready
  1654. .sink_channel (router_002_src_channel), // .channel
  1655. .sink_data (router_002_src_data), // .data
  1656. .sink_startofpacket (router_002_src_startofpacket), // .startofpacket
  1657. .sink_endofpacket (router_002_src_endofpacket), // .endofpacket
  1658. .sink_valid (router_002_src_valid), // .valid
  1659. .src0_ready (rsp_demux_src0_ready), // src0.ready
  1660. .src0_valid (rsp_demux_src0_valid), // .valid
  1661. .src0_data (rsp_demux_src0_data), // .data
  1662. .src0_channel (rsp_demux_src0_channel), // .channel
  1663. .src0_startofpacket (rsp_demux_src0_startofpacket), // .startofpacket
  1664. .src0_endofpacket (rsp_demux_src0_endofpacket), // .endofpacket
  1665. .src1_ready (rsp_demux_src1_ready), // src1.ready
  1666. .src1_valid (rsp_demux_src1_valid), // .valid
  1667. .src1_data (rsp_demux_src1_data), // .data
  1668. .src1_channel (rsp_demux_src1_channel), // .channel
  1669. .src1_startofpacket (rsp_demux_src1_startofpacket), // .startofpacket
  1670. .src1_endofpacket (rsp_demux_src1_endofpacket) // .endofpacket
  1671. );
  1672. nios2_uc_mm_interconnect_0_rsp_demux rsp_demux_001 (
  1673. .clk (clk_50_clk_clk), // clk.clk
  1674. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1675. .sink_ready (router_003_src_ready), // sink.ready
  1676. .sink_channel (router_003_src_channel), // .channel
  1677. .sink_data (router_003_src_data), // .data
  1678. .sink_startofpacket (router_003_src_startofpacket), // .startofpacket
  1679. .sink_endofpacket (router_003_src_endofpacket), // .endofpacket
  1680. .sink_valid (router_003_src_valid), // .valid
  1681. .src0_ready (rsp_demux_001_src0_ready), // src0.ready
  1682. .src0_valid (rsp_demux_001_src0_valid), // .valid
  1683. .src0_data (rsp_demux_001_src0_data), // .data
  1684. .src0_channel (rsp_demux_001_src0_channel), // .channel
  1685. .src0_startofpacket (rsp_demux_001_src0_startofpacket), // .startofpacket
  1686. .src0_endofpacket (rsp_demux_001_src0_endofpacket), // .endofpacket
  1687. .src1_ready (rsp_demux_001_src1_ready), // src1.ready
  1688. .src1_valid (rsp_demux_001_src1_valid), // .valid
  1689. .src1_data (rsp_demux_001_src1_data), // .data
  1690. .src1_channel (rsp_demux_001_src1_channel), // .channel
  1691. .src1_startofpacket (rsp_demux_001_src1_startofpacket), // .startofpacket
  1692. .src1_endofpacket (rsp_demux_001_src1_endofpacket) // .endofpacket
  1693. );
  1694. nios2_uc_mm_interconnect_0_rsp_demux rsp_demux_002 (
  1695. .clk (clk_50_clk_clk), // clk.clk
  1696. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1697. .sink_ready (router_004_src_ready), // sink.ready
  1698. .sink_channel (router_004_src_channel), // .channel
  1699. .sink_data (router_004_src_data), // .data
  1700. .sink_startofpacket (router_004_src_startofpacket), // .startofpacket
  1701. .sink_endofpacket (router_004_src_endofpacket), // .endofpacket
  1702. .sink_valid (router_004_src_valid), // .valid
  1703. .src0_ready (rsp_demux_002_src0_ready), // src0.ready
  1704. .src0_valid (rsp_demux_002_src0_valid), // .valid
  1705. .src0_data (rsp_demux_002_src0_data), // .data
  1706. .src0_channel (rsp_demux_002_src0_channel), // .channel
  1707. .src0_startofpacket (rsp_demux_002_src0_startofpacket), // .startofpacket
  1708. .src0_endofpacket (rsp_demux_002_src0_endofpacket), // .endofpacket
  1709. .src1_ready (rsp_demux_002_src1_ready), // src1.ready
  1710. .src1_valid (rsp_demux_002_src1_valid), // .valid
  1711. .src1_data (rsp_demux_002_src1_data), // .data
  1712. .src1_channel (rsp_demux_002_src1_channel), // .channel
  1713. .src1_startofpacket (rsp_demux_002_src1_startofpacket), // .startofpacket
  1714. .src1_endofpacket (rsp_demux_002_src1_endofpacket) // .endofpacket
  1715. );
  1716. nios2_uc_mm_interconnect_0_rsp_demux rsp_demux_003 (
  1717. .clk (clk_50_clk_clk), // clk.clk
  1718. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1719. .sink_ready (router_005_src_ready), // sink.ready
  1720. .sink_channel (router_005_src_channel), // .channel
  1721. .sink_data (router_005_src_data), // .data
  1722. .sink_startofpacket (router_005_src_startofpacket), // .startofpacket
  1723. .sink_endofpacket (router_005_src_endofpacket), // .endofpacket
  1724. .sink_valid (router_005_src_valid), // .valid
  1725. .src0_ready (rsp_demux_003_src0_ready), // src0.ready
  1726. .src0_valid (rsp_demux_003_src0_valid), // .valid
  1727. .src0_data (rsp_demux_003_src0_data), // .data
  1728. .src0_channel (rsp_demux_003_src0_channel), // .channel
  1729. .src0_startofpacket (rsp_demux_003_src0_startofpacket), // .startofpacket
  1730. .src0_endofpacket (rsp_demux_003_src0_endofpacket), // .endofpacket
  1731. .src1_ready (rsp_demux_003_src1_ready), // src1.ready
  1732. .src1_valid (rsp_demux_003_src1_valid), // .valid
  1733. .src1_data (rsp_demux_003_src1_data), // .data
  1734. .src1_channel (rsp_demux_003_src1_channel), // .channel
  1735. .src1_startofpacket (rsp_demux_003_src1_startofpacket), // .startofpacket
  1736. .src1_endofpacket (rsp_demux_003_src1_endofpacket) // .endofpacket
  1737. );
  1738. nios2_uc_mm_interconnect_0_rsp_mux rsp_mux (
  1739. .clk (clk_50_clk_clk), // clk.clk
  1740. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1741. .src_ready (rsp_mux_src_ready), // src.ready
  1742. .src_valid (rsp_mux_src_valid), // .valid
  1743. .src_data (rsp_mux_src_data), // .data
  1744. .src_channel (rsp_mux_src_channel), // .channel
  1745. .src_startofpacket (rsp_mux_src_startofpacket), // .startofpacket
  1746. .src_endofpacket (rsp_mux_src_endofpacket), // .endofpacket
  1747. .sink0_ready (rsp_demux_src0_ready), // sink0.ready
  1748. .sink0_valid (rsp_demux_src0_valid), // .valid
  1749. .sink0_channel (rsp_demux_src0_channel), // .channel
  1750. .sink0_data (rsp_demux_src0_data), // .data
  1751. .sink0_startofpacket (rsp_demux_src0_startofpacket), // .startofpacket
  1752. .sink0_endofpacket (rsp_demux_src0_endofpacket), // .endofpacket
  1753. .sink1_ready (rsp_demux_001_src0_ready), // sink1.ready
  1754. .sink1_valid (rsp_demux_001_src0_valid), // .valid
  1755. .sink1_channel (rsp_demux_001_src0_channel), // .channel
  1756. .sink1_data (rsp_demux_001_src0_data), // .data
  1757. .sink1_startofpacket (rsp_demux_001_src0_startofpacket), // .startofpacket
  1758. .sink1_endofpacket (rsp_demux_001_src0_endofpacket), // .endofpacket
  1759. .sink2_ready (rsp_demux_002_src0_ready), // sink2.ready
  1760. .sink2_valid (rsp_demux_002_src0_valid), // .valid
  1761. .sink2_channel (rsp_demux_002_src0_channel), // .channel
  1762. .sink2_data (rsp_demux_002_src0_data), // .data
  1763. .sink2_startofpacket (rsp_demux_002_src0_startofpacket), // .startofpacket
  1764. .sink2_endofpacket (rsp_demux_002_src0_endofpacket), // .endofpacket
  1765. .sink3_ready (rsp_demux_003_src0_ready), // sink3.ready
  1766. .sink3_valid (rsp_demux_003_src0_valid), // .valid
  1767. .sink3_channel (rsp_demux_003_src0_channel), // .channel
  1768. .sink3_data (rsp_demux_003_src0_data), // .data
  1769. .sink3_startofpacket (rsp_demux_003_src0_startofpacket), // .startofpacket
  1770. .sink3_endofpacket (rsp_demux_003_src0_endofpacket) // .endofpacket
  1771. );
  1772. nios2_uc_mm_interconnect_0_rsp_mux rsp_mux_001 (
  1773. .clk (clk_50_clk_clk), // clk.clk
  1774. .reset (nios2_reset_reset_bridge_in_reset_reset), // clk_reset.reset
  1775. .src_ready (rsp_mux_001_src_ready), // src.ready
  1776. .src_valid (rsp_mux_001_src_valid), // .valid
  1777. .src_data (rsp_mux_001_src_data), // .data
  1778. .src_channel (rsp_mux_001_src_channel), // .channel
  1779. .src_startofpacket (rsp_mux_001_src_startofpacket), // .startofpacket
  1780. .src_endofpacket (rsp_mux_001_src_endofpacket), // .endofpacket
  1781. .sink0_ready (rsp_demux_src1_ready), // sink0.ready
  1782. .sink0_valid (rsp_demux_src1_valid), // .valid
  1783. .sink0_channel (rsp_demux_src1_channel), // .channel
  1784. .sink0_data (rsp_demux_src1_data), // .data
  1785. .sink0_startofpacket (rsp_demux_src1_startofpacket), // .startofpacket
  1786. .sink0_endofpacket (rsp_demux_src1_endofpacket), // .endofpacket
  1787. .sink1_ready (rsp_demux_001_src1_ready), // sink1.ready
  1788. .sink1_valid (rsp_demux_001_src1_valid), // .valid
  1789. .sink1_channel (rsp_demux_001_src1_channel), // .channel
  1790. .sink1_data (rsp_demux_001_src1_data), // .data
  1791. .sink1_startofpacket (rsp_demux_001_src1_startofpacket), // .startofpacket
  1792. .sink1_endofpacket (rsp_demux_001_src1_endofpacket), // .endofpacket
  1793. .sink2_ready (rsp_demux_002_src1_ready), // sink2.ready
  1794. .sink2_valid (rsp_demux_002_src1_valid), // .valid
  1795. .sink2_channel (rsp_demux_002_src1_channel), // .channel
  1796. .sink2_data (rsp_demux_002_src1_data), // .data
  1797. .sink2_startofpacket (rsp_demux_002_src1_startofpacket), // .startofpacket
  1798. .sink2_endofpacket (rsp_demux_002_src1_endofpacket), // .endofpacket
  1799. .sink3_ready (rsp_demux_003_src1_ready), // sink3.ready
  1800. .sink3_valid (rsp_demux_003_src1_valid), // .valid
  1801. .sink3_channel (rsp_demux_003_src1_channel), // .channel
  1802. .sink3_data (rsp_demux_003_src1_data), // .data
  1803. .sink3_startofpacket (rsp_demux_003_src1_startofpacket), // .startofpacket
  1804. .sink3_endofpacket (rsp_demux_003_src1_endofpacket) // .endofpacket
  1805. );
  1806. nios2_uc_mm_interconnect_0_avalon_st_adapter #(
  1807. .inBitsPerSymbol (34),
  1808. .inUsePackets (0),
  1809. .inDataWidth (34),
  1810. .inChannelWidth (0),
  1811. .inErrorWidth (0),
  1812. .inUseEmptyPort (0),
  1813. .inUseValid (1),
  1814. .inUseReady (1),
  1815. .inReadyLatency (0),
  1816. .outDataWidth (34),
  1817. .outChannelWidth (0),
  1818. .outErrorWidth (1),
  1819. .outUseEmptyPort (0),
  1820. .outUseValid (1),
  1821. .outUseReady (1),
  1822. .outReadyLatency (0)
  1823. ) avalon_st_adapter (
  1824. .in_clk_0_clk (clk_50_clk_clk), // in_clk_0.clk
  1825. .in_rst_0_reset (nios2_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
  1826. .in_0_data (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data), // in_0.data
  1827. .in_0_valid (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid), // .valid
  1828. .in_0_ready (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready), // .ready
  1829. .out_0_data (avalon_st_adapter_out_0_data), // out_0.data
  1830. .out_0_valid (avalon_st_adapter_out_0_valid), // .valid
  1831. .out_0_ready (avalon_st_adapter_out_0_ready), // .ready
  1832. .out_0_error (avalon_st_adapter_out_0_error) // .error
  1833. );
  1834. nios2_uc_mm_interconnect_0_avalon_st_adapter #(
  1835. .inBitsPerSymbol (34),
  1836. .inUsePackets (0),
  1837. .inDataWidth (34),
  1838. .inChannelWidth (0),
  1839. .inErrorWidth (0),
  1840. .inUseEmptyPort (0),
  1841. .inUseValid (1),
  1842. .inUseReady (1),
  1843. .inReadyLatency (0),
  1844. .outDataWidth (34),
  1845. .outChannelWidth (0),
  1846. .outErrorWidth (1),
  1847. .outUseEmptyPort (0),
  1848. .outUseValid (1),
  1849. .outUseReady (1),
  1850. .outReadyLatency (0)
  1851. ) avalon_st_adapter_001 (
  1852. .in_clk_0_clk (clk_50_clk_clk), // in_clk_0.clk
  1853. .in_rst_0_reset (nios2_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
  1854. .in_0_data (nios2_debug_mem_slave_agent_rdata_fifo_src_data), // in_0.data
  1855. .in_0_valid (nios2_debug_mem_slave_agent_rdata_fifo_src_valid), // .valid
  1856. .in_0_ready (nios2_debug_mem_slave_agent_rdata_fifo_src_ready), // .ready
  1857. .out_0_data (avalon_st_adapter_001_out_0_data), // out_0.data
  1858. .out_0_valid (avalon_st_adapter_001_out_0_valid), // .valid
  1859. .out_0_ready (avalon_st_adapter_001_out_0_ready), // .ready
  1860. .out_0_error (avalon_st_adapter_001_out_0_error) // .error
  1861. );
  1862. nios2_uc_mm_interconnect_0_avalon_st_adapter #(
  1863. .inBitsPerSymbol (34),
  1864. .inUsePackets (0),
  1865. .inDataWidth (34),
  1866. .inChannelWidth (0),
  1867. .inErrorWidth (0),
  1868. .inUseEmptyPort (0),
  1869. .inUseValid (1),
  1870. .inUseReady (1),
  1871. .inReadyLatency (0),
  1872. .outDataWidth (34),
  1873. .outChannelWidth (0),
  1874. .outErrorWidth (1),
  1875. .outUseEmptyPort (0),
  1876. .outUseValid (1),
  1877. .outUseReady (1),
  1878. .outReadyLatency (0)
  1879. ) avalon_st_adapter_002 (
  1880. .in_clk_0_clk (clk_50_clk_clk), // in_clk_0.clk
  1881. .in_rst_0_reset (nios2_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
  1882. .in_0_data (onchip_memory2_s1_agent_rdata_fifo_src_data), // in_0.data
  1883. .in_0_valid (onchip_memory2_s1_agent_rdata_fifo_src_valid), // .valid
  1884. .in_0_ready (onchip_memory2_s1_agent_rdata_fifo_src_ready), // .ready
  1885. .out_0_data (avalon_st_adapter_002_out_0_data), // out_0.data
  1886. .out_0_valid (avalon_st_adapter_002_out_0_valid), // .valid
  1887. .out_0_ready (avalon_st_adapter_002_out_0_ready), // .ready
  1888. .out_0_error (avalon_st_adapter_002_out_0_error) // .error
  1889. );
  1890. nios2_uc_mm_interconnect_0_avalon_st_adapter #(
  1891. .inBitsPerSymbol (34),
  1892. .inUsePackets (0),
  1893. .inDataWidth (34),
  1894. .inChannelWidth (0),
  1895. .inErrorWidth (0),
  1896. .inUseEmptyPort (0),
  1897. .inUseValid (1),
  1898. .inUseReady (1),
  1899. .inReadyLatency (0),
  1900. .outDataWidth (34),
  1901. .outChannelWidth (0),
  1902. .outErrorWidth (1),
  1903. .outUseEmptyPort (0),
  1904. .outUseValid (1),
  1905. .outUseReady (1),
  1906. .outReadyLatency (0)
  1907. ) avalon_st_adapter_003 (
  1908. .in_clk_0_clk (clk_50_clk_clk), // in_clk_0.clk
  1909. .in_rst_0_reset (nios2_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
  1910. .in_0_data (pio_led_s1_agent_rdata_fifo_src_data), // in_0.data
  1911. .in_0_valid (pio_led_s1_agent_rdata_fifo_src_valid), // .valid
  1912. .in_0_ready (pio_led_s1_agent_rdata_fifo_src_ready), // .ready
  1913. .out_0_data (avalon_st_adapter_003_out_0_data), // out_0.data
  1914. .out_0_valid (avalon_st_adapter_003_out_0_valid), // .valid
  1915. .out_0_ready (avalon_st_adapter_003_out_0_ready), // .ready
  1916. .out_0_error (avalon_st_adapter_003_out_0_error) // .error
  1917. );
  1918. endmodule